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MC68HC05X16 Datasheet, PDF (140/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit
10
Freescale Semiconductor, Inc.
Table 10-1 Effect of RESET, POR, STOP and WAIT
Function/effect
RESET POR WAIT STOP
Timer prescaler cleared
x
x
–
–
Timer counter set to $FFFC
x
x
–
–
All timer enable bits cleared (disable)
x
x
–
–
Data direction registers cleared (inputs) x
x
–
–
Stack pointer set to $00FF
x
x
–
–
Internal address bus forced to restart
x
x
–
–
Vector $3FFE, $3FFF
x
x
–
–
Interrupt mask bit (I-bit CCR) set
x
x
–
–
Interrupt mask bit (I-bit CCR) cleared
–
–
x
x
Interrupt enable bit (INTE) set
x
x
–
–
POR bit in miscellaneous register set
–
x
–
–
STOP latch reset
x
x
–
–
IRQ latch reset
x
x
–
–
WAIT latch reset
x
x
–
–
SCI disabled
x
x
–
–
SCI status bits cleared (except TDRE
and TC)
x
x
–
–
SCI interrupt enable bits cleared
x
x
–
–
SCI status bits TDRE and TC set
x
x
–
–
Oscillator disabled for 4064 cycles
–
x
–
x
Timer clock cleared
–
x
–
x
SCI clock cleared
–
x
–
x
A/D disabled
x
x
–
x
SM bit in the miscellaneous register
cleared
x
x
–
x
Watchdog counter reset
x
x
x
x
WDOG bit in the miscellaneous register
reset
x
x
–
x
EEPROM control bits set or cleared (as
per Section 3.5.1)
x
x
–
x
x = Described action takes place
– = Described action does not take
place
RESETS AND INTERRUPTS
MC68HC05X16
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Rev. 1
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