MC68HC05X16 Datasheet, PDF (137/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
10.1.3 RESET pin
When the oscillator is running in a stable condition, the MCU is reset when a logic zero is applied
to the RESET input for a minimum period of 1.5 machine cycles (t_CYC). An internal Schmitt Trigger
is used to improve noise immunity on this pin. When the RESET pin goes high, the MCU will
resume operation on the following cycle. When a reset condition occurs internally, i.e. from POR
or the COP watchdog, the RESET pin provides an active-low open drain output signal which may
be used to reset external hardware. Current limitation to protect the pull-down device is provided
in case an RC type external reset circuit is used.
Note:
If an external RC is connected to RESET, turning on the RESET pull-down transistor
may discharge the capacitor. The device will then remain in reset until the capacitor has
recharged, after turning off the pull-down device.
VDD
pin
MC68HC05X16
RESET
pin
Figure 10-2 RESET external RC pull-down
10.1.4 Computer operating properly (COP) watchdog reset
10
The watchdog counter system consists of a divide-by-7 counter, preceded by a fixed divide-by-4
and a fixed divide-by-256 prescaler, plus control logic as shown in Figure 10-3. The divide-by-7
counter can be reset by software.
Note:
The input to the watchdog system is derived from the carry output of bit 7 of the free
running timer counter. Therefore, a reset of the timer may affect the period of the
watchdog timeout.
MC68HC05X16
RESETS AND INTERRUPTS
For More Information On This Product,
10-3
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