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MC68HC908GR8 Datasheet, PDF (74/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Clock Generator Module (CGMC)
When the tolerance on the bus frequency is tight, choose fRCLK to an integer divisor of fBUSDES,
and R = 1. If fRCLK cannot meet this requirement, use the following equation to solve for R with
practical choices of fRCLK, and choose the fRCLK that gives the lowest R.
R
=
round
RM
A
X
×
⎧
⎨
⎩
⎛
⎜
⎝
f--V----fC--R--L--C-K--L-D--K--E----S- ⎠⎟⎞
–
⎛
integer⎜
⎝
-f-V----fC--R--L--C-K--L-D--K--E----S- ⎠⎟⎞
⎫
⎬
⎭
4. Select a VCO frequency multiplier, N.
N
=
r
o
un
⎛
d⎜
⎝
R------×-----ff--VR----CC---L-L--K-K---D----E---S--⎠⎟⎞
Reduce N/R to the lowest possible R.
5. If N is < Nmax, use P = 0. If N > Nmax, choose P using this table:
Then recalculate N:
Current N Value
P
0 < N ≤ Nmax
0
Nmax < N ≤ Nmax × 2
1
Nmax × 2 < N ≤ Nmax × 4
2
Nmax × 4 < N ≤ Nmax × 8
3
N
=
ro
un
⎛
d⎜
⎝
-R----f-×-R---C-f--V-L---CK---L--×-K----2D---P-E---S--⎠⎟⎞
6. Calculate and verify the adequacy of the VCO and bus frequencies fVCLK and fBUS.
fVCLK = (2P × N ⁄ R) × fRCLK
fBUS = (fVCLK) ⁄ 4
7. Select the VCO’s power-of-two range multiplier E, according to this table:
Frequency Range
E
0 < fVCLK < 8 MHz
0
9,830,400 ≤ fVCLK < 16 MHz
1
19,660,800 ≤ fVCLK < 32 MHz
2
NOTE: Do not program E to a value of 3.
8. Select a VCO linear range multiplier, L, where fNOM = 38.4 kHz
L
=
r
ou
⎛
nd⎜
⎝
2----E--f--V-×---C--f-NL---K-O----M---⎠⎟⎞
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
74
Freescale Semiconductor