MC68HC908GR8 Datasheet, PDF (114/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Flash Memory
11.7 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made for protecting a block of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using of a FLASH Block Protect Register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be protected. The range
of the protected area starts from a location defined by FLBPR and ends at the bottom of the FLASH
memory ($FFFF). When the memory is protected, the HVEN bit cannot be set in either ERASE or
PROGRAM operations.
NOTE
In performing a program or erase operation, the FLASH block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit
When the FLBPR is programmed with all 0s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory with address ranges as shown
in FLASH Block Protect Register. Once the FLBPR is programmed with a value other than $FF, any erase
or program of the FLBPR or the protected block of FLASH memory is prohibited. Mass erase is disabled
whenever any block is protected (FLBPR does not equal $FF). The presence of a V_TST on the IRQ pin
will bypass the block protection so that all of the memory included in the block protect register is open for
program and erase operation.
NOTE
The FLASH block protect register is not protected with special hardware or
software. Therefore, if this page is not protected by FLBPR, the register is
erased by either a page or mass erase operation.
11.7.1 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte within the FLASH memory, and
therefore can only be written during a programming sequence of the FLASH memory. The value in this
register determines the starting location of the protected range within the FLASH memory.
Address: $FF7E
Bit 7
6
5
4
3
2
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
Reset: U
U
U
U
U
U
U = Unaffected by reset. Initial value from factory is 1.
Write to this register is by a programming sequence to the FLASH memory.
1
BPR1
U
Figure 11-3. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
U
BPR[7:0] — FLASH Block Protect Bits
These eight bits represent bits [13:6] of a 16-bit memory address. Bits [15:14] are 1s and bits [5:0]
are 0s.
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
114
Freescale Semiconductor