MC68HC908GR8 Datasheet, PDF (29/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Note: $FFF6–$FFFD
contains
8 security bytes
$FE0D
↓
$FE0F
Reserved
3 Bytes
$FE10
↓
$FE1F
Unimplemented
16 Bytes
Reserved for Compatibility with Monitor Code
for A-Family Parts
$FE20
↓
$FF55
Monitor ROM
310 Bytes
$FF56
↓
$FF7D
Unimplemented
40 Bytes
$FF7E
FLASH Block Protect Register (FLBPR)
$FF7F
↓
$FFDB
Unimplemented
93 Bytes
$FFDC
↓
$FFFE
FLASH Vectors
(36 Bytes including $FFFF)
$FFFF
Low byte of reset vector when read
COP Control Register (COPCTL)
Figure 2-1. Memory Map (Continued)
Register Summary
2.6 Register Summary
Addr.
$0000
$0001
$0002
$0003
Register Name
Bit 7
Read: 0
Port A Data Register
(PTA)
Write:
Reset:
Read: 0
Port B Data Register
(PTB)
Write:
Reset:
Read: 0
Port C Data Register
(PTC)
Write:
Reset:
Read: 0
Port D Data Register
(PTD)
Write:
Reset:
6
5
4
3
0
0
0
PTA3
Unaffected by reset
0
PTB5
PTB4
PTB3
Unaffected by reset
0
0
0
0
Unaffected by reset
PTD6
PTD5
PTD4
PTD3
= Unimplemented
Unaffected by reset
R = Reserved
2
PTA2
1
PTA1
PTB2
PTB1
0
PTC1
PTD2
PTD1
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)
Bit 0
PTA0
PTB0
PTC0
PTD0
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
29