MC68HC908GR8 Datasheet, PDF (21/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

1.3 MCU Block Diagram
Figure 1-1 shows the structure of the MC68HC908GR8.
M68HC08 CPU
CPU
REGISTERS
ARITHMETIC/LOGIC
UNIT (ALU)
CONTROL AND STATUS REGISTERS — 64 BYTES
MC68HC908GR8 USER FLASH — 7680 BYTES
MC68HC908GR4 USER FLASH — 4096BYTES
USER RAM — 384 BYTES
MONITOR ROM — 310 BYTES
FLASH PROGRAMMING (BURN-IN) ROM — 544 BYTES
USER FLASH VECTOR SPACE — 36 BYTES
OSC1
OSC2
CLOCK GENERATOR MODULE
32-kHz OSCILLATOR
CGMXFC
PHASE-LOCKED LOOP
* RST
* IRQ
V_{DDAD /} V_REFH
V_SSAD / V_REFL
V_DD
V_SS
V_DDA
V_SSA
24 INTR SYSTEM INTEGRATION
MODULE
SINGLE EXTERNAL IRQ
MODULE
8-BIT ANALOG-TO-DIGITAL
CONVERTER MODULE
POWER
INTERNAL BUS
PROGR. TIMEBASE
MODULE
SINGLE BRKPT BREAK
MODULE
DUAL V. LOW-VOLTAGE INHIBIT
MODULE
4-BIT KEYBOARD
INTERRUPT MODULE
2-CHANNEL TIMER INTERFACE
MODULE 1
1-CHANNEL TIMER INTERFACE
MODULE 2
SERIAL COMMUNICATIONS
INTERFACE MODULE
COMPUTER OPERATING
PROPERLY MODULE
SERIAL PERIPHERAL
INTERFACE MODULE
MONITOR MODULE
DATA BUS SWITCH
MODULE
MEMORY MAP
MODULE
MASK OPTION REGISTER1
MODULE
MASK OPTION REGISTER2
MODULE
† Ports are software configurable with pullup device if input port.
‡ Higher current drive port pins
* Pin contains integrated pullup device
Figure 1-1. MCU Block Diagram
MCU Block Diagram
PTA3/KBD3–
PTA0/KBD0 †
PTB5/AD5–
PTB0/AD0
PTC1–PTC0 † ‡
PTD6/T2CH0 †
PTD5/T1CH1 †
PTD4/T1CH0 †
PTD3/SPSCK †
PTD2/MOSI †
PTD1/MISO †
PTD0/SS †
PTE1/RxD
PTE0/TxD
POWER-ON RESET
MODULE
SECURITY
MODULE
MONITOR MODE ENTRY
MODULE
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
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