MC68HC908GR8 Datasheet, PDF (56/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Analog-to-Digital Converter (ADC)
INTERNAL DATA BUS
READ DDRBx
WRITE DDRBx
RESET
WRITE PTBx
READ PTBx
DDRBx
PTBx
DISABLE
PTBx
ADC CHANNEL x
ADC DATA REGISTER
CONVERSION
INTERRUPT ^COMPLETE
LOGIC
ADC
DISABLE
ADC
VOLTAGE IN
(V_ADIN)
CHANNEL
SELECT
ADCH4–ADCH0
AIEN COCO
CGMXCLK
BUS CLOCK
ADC CLOCK
CLOCK
GENERATOR
ADIV2–ADIV0 ADICLK
Figure 5-1. ADC Block Diagram
5.3.2 Voltage Conversion
When the input voltage to the ADC equals V_REFH, the ADC converts the signal to $FF (full scale). If the
input voltage equals V_REFL, the ADC converts it to $00. Input voltages between V_REFH and V_REFL are a
straight-line linear conversion. All other input voltages will result in $FF, if greater than V_REFH.
NOTE
Inside the ADC module, the reference voltage, V_REFH is connected to the
ADC analog power V_DDAD; and V_REFL is connected to the ADC analog
ground V_DDAD. Therefore, the ADC input voltage should not exceed the
analog supply voltages
For operation, V_DDAD should be tied to the same potential as V_DD via
separate traces
5.3.3 Conversion Time
Sixteen ADC internal clocks are required to perform one conversion. The ADC starts a conversion on the
first rising edge of the ADC internal clock immediately following a write to the ADSCR. If the ADC internal
clock is selected to run at 1 MHz, then one conversion will take 16 μs to complete. But since the ADC can
run almost completely asynchronously to the bus clock, (for example, the ADC is configured to derive its
internal clock from CGMXCLK and the bus clock is being derived from the PLL within the CGM
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
56
Freescale Semiconductor