MC68HC908GR8 Datasheet, PDF (30/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Memory Map
Addr.
$0004
$0005
$0006
$0007
$0008
$0009
↓
$000B
$000C
$000D
$000E
$000F
$0010
$0011
Register Name
Read:
Data Direction Register A
(DDRA)
Write:
Reset:
Read:
Data Direction Register B
(DDRB)
Write:
Reset:
Read:
Data Direction Register C
(DDRC)
Write:
Reset:
Read:
Data Direction Register D
(DDRD)
Write:
Reset:
Read:
Port E Data Register
(PTE)
Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Data Direction Register E
(DDRE)
Write:
Reset:
Read:
Port A Input Pullup Enable
Register (PTAPUE)
Write:
Reset:
Read:
Port C Input Pullup Enable
Register (PTCPUE)
Write:
Reset:
Read:
Port D Input Pullup Enable
Register (PTDPUE)
Write:
Reset:
Read:
SPI Control Register
(SPCR)
Write:
Reset:
Read:
SPI Status and Control
Register (SPSCR)
Write:
Reset:
Bit 7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPRIE
0
SPRF
0
6
0
0
0
0
0
0
DDRD6
0
0
5
0
0
DDRB5
0
0
0
DDRD5
0
0
4
0
0
DDRB4
0
0
3
DDRA3
0
DDRB3
0
0
0
DDRD4
0
0
0
DDRD3
0
0
Unaffected by reset
2
DDRA2
0
DDRB2
0
0
0
DDRD2
0
0
1
DDRA1
0
DDRB1
0
DDRC1
0
DDRD1
0
PTE1
Bit 0
DDRA0
0
DDRB0
0
DDRC0
0
DDRD0
0
PTE0
0
0
0
0
0
0
0
0
0
0
0
0
DDRE1 DDRE0
0
0
0
0
0
0
0
0
0
0
PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
0
0
0
0
0
0
0
0
0
0
0
0
PTCPUE1 PTCPUE0
0
0
0
0
0
0
0
PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
0
0
0
0
0
0
0
R
SPMSTR CPOL CPHA SPWOM SPE
SPTIE
0
ERRIE
1
OVRF
0
MODF
1
SPTE
0
MODFEN
0
SPR1
0
SPR0
0
0
0
1
0
0
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 7)
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
30
Freescale Semiconductor