MC68HC908GR8 Datasheet, PDF (49/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Interrupts
4.3.2 Sources
The sources in Table 4-1 can generate CPU interrupt requests.
Table 4-1. Interrupt Sources
Reset
Source
Flag
None
Mask⁽¹⁾
None
INT Register
Flag
None
SWI instruction
None
None
None
IRQ pin
CGM (PLL)
TIM1 channel 0
TIM1 channel 1
TIM1 overflow
TIM2 channel 0
TIM2 overflow
SPI receiver full
SPI overflow
SPI mode fault
SPI transmitter empty
SCI receiver overrun
SCI noise fag
SCI framing error
SCI parity error
SCI receiver full
SCI input idle
SCI transmitter empty
SCI transmission complete
Keyboard pin
ADC conversion complete
Timebase
IRQF
PLLF
CH0F
CH1F
TOF
CH0F
TOF
SPRF
OVRF
MODF
SPTE
OR
NF
FE
PE
SCRF
IDLE
SCTE
TC
KEYF
COCO
TBIF
IMASK1
PLLIE
CH0IE
CH1IE
TOIE
CH0IE
TOIE
SPRIE
ERRIE
ERRIE
SPTIE
ORIE
NEIE
FEIE
PEIE
SCRIE
ILIE
SCTIE
TCIE
IMASKK
AIEN
TBIE
IF1
IF2
IF3
IF4
IF5
IF6
IF8
IF9
IF10
IF11
IF12
IF13
IF14
IF15
IF16
Priority⁽²⁾
0
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
Vector
Address
$FFFE–$FFFF
$FFFC–$FFFD
$FFFA–$FFFB
$FFF8–$FFF9
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFF0–$FFF1
$FFEC–$FFED
$FFEA–$FFEB
$FFE8–$FFE9
$FFE6–$FFE7
$FFE4–$FFE5
$FFE2–$FFE3
$FFDE–$FFDF
$FFDE–$FFDF
$FFDC–$FFDD
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
2. 0 = highest priority
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
49