MC68HC908GR8 Datasheet, PDF (206/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Serial Peripheral Interface (SPI)
20.3 Pin Name Conventions and I/O Register Addresses
The text that follows describes the SPI. The SPI I/O pin names are SS (slave select), SPSCK (SPI serial
clock), MOSI (master out slave in), and MISO (master in/slave out). The SPI shares four I/O pins with four
parallel I/O ports.
The full names of the SPI I/O pins are shown in Table 20-1. The generic pin names appear in the text that
follows.
Table 20-1. Pin Name Conventions
SPI Generic
Pin Names:
Full SPI
Pin Names:
SPI
MISO
PTD1/ATD9
MOSI
PTD2/ATD10
SS
PTD0/ATD8
SPSCK
PTD3/ATD11
CGND
V_SS
20.4 Functional Description
Figure 20-1 summarizes the SPI I/O registers and Figure 20-2 shows the structure of the SPI module.
Addr.
$0010
$0011
$0012
Register Name
Read:
SPI Control Register
(SPCR)
Write:
Reset:
Read:
SPI Status and Control
Register (SPSCR)
Write:
Reset:
Read:
SPI Data Register
(SPDR)
Write:
Reset:
Bit 7
SPRIE
0
SPRF
0
R7
T7
6
5
R
SPMSTR
0
ERRIE
1
OVRF
0
0
R6
R5
T6
T5
= Unimplemented
4
3
2
CPOL CPHA SPWOM
0
MODF
1
SPTE
0
MODFEN
0
1
0
R4
R3
R2
T4
T3
T2
Unaffected by reset
R = Reserved
Figure 20-1. SPI I/O Register Summary
1
SPE
0
SPR1
0
R1
T1
Bit 0
SPTIE
0
SPR0
0
R0
T0
The SPI module allows full-duplex, synchronous, serial communication between the MCU and peripheral
devices, including other MCUs. Software can poll the SPI status flags or SPI operation can be
interrupt-driven.
If a port bit is configured for input, then an internal pullup device may be enabled for that port bit. See
16.5.3 Port D Input Pullup Enable Register.
The following paragraphs describe the operation of the SPI module.
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
206
Freescale Semiconductor