MC68HC908GR8 Datasheet, PDF (129/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

LVI Status Register
14.3.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects whether the LVI is configured for 5V or 3V protection.
NOTE
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V_TRIPF [5 V] or V_TRIPF [3 V]) may be lower than this. (See
Chapter 23 Electrical Specifications for the actual trip point voltages.)
14.4 LVI Status Register
The LVI status register (LVISR) indicates if the V_DD voltage was detected below the V_TRIPF level.
Address: $FE0C
Bit 7
6
5
4
3
2
1
Bit 0
Read: LVIOUT
0
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 14-3. LVI Status Register (LVISR)
LVIOUT — LVI Output Bit
This read-only flag becomes set when the V_DD voltage falls below the V_TRIPF trip voltage. See
Table 14-1. Reset clears the LVIOUT bit.
Table 14-1. LVIOUT Bit Indication
V_DD
V_DD > V_TRIPR
V_DD < V_TRIPF
V_TRIPF < V_DD < V_TRIPR
LVIOUT
0
1
Previous value
14.5 LVI Interrupts
The LVI module does not generate interrupt requests.
14.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
14.6.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
14.6.2 Stop Mode
If enabled in stop mode (LVISTOP bit in the configuration register is set), the LVI module remains active
in stop mode. If enabled to generate resets, the LVI module can generate a reset and bring the MCU out
of stop mode.
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
129