MC68HC908GR8 Datasheet, PDF (112/286 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Flash Memory
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
address and data for programming.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t_nvs (min. 10μs).
5. Set the HVEN bit.
6. Wait for a time, t_pgs (min. 5μs).
7. Write data to the FLASH address to be programmed.
8. Wait for a time, t_PROG (min. 30μs).
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
10. Clear the PGM bit.*
11. Wait for a time, t_nvh (min. 5μs).
12. Clear the HVEN bit.
13. After time, t_rcv (typical 1μs), the memory can be accessed in read mode again.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Care must be taken within the FLASH array
memory space such as the COP control register (COPCTL) at $FFFF.
NOTE
It is highly recommended that interrupts be disabled during program/erase
operations.
NOTE
Do not exceed t_PROG maximum or t_HV maximum. t_HV is defined as the
cumulative high voltage programming time to the same row before next
erase. t_HV must satisfy this condition:
t_NVS + t_NVH + t_PGS + (t_PROG x 32) ≤ t_HV maximum
Refer to 23.16 Memory Characteristics.
NOTE
The time between programming the FLASH address change (step 7 to
step 7), or the time between the last FLASH programmed to clearing the
PGM bit (step 7 to step 10) must not exceed the maximum programming
time, t_PROG maximum.
CAUTION
Be cautious when programming the FLASH array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm or
the byte to be programmed in step 7 of the algorithm. This applies
particularly to $FFD4–$FFDF.
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
112
Freescale Semiconductor