MC9S08DZ60CLH Datasheet, PDF (56/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 4 Memory
program time provided that the conditions above are met. If the next sequential address is the beginning of
a new row, the program time for that byte will be the standard time instead of the burst time. This is because
the high voltage to the array must be disabled and then enabled again. If a new burst command has not been
queued before the current command completes, then the charge pump will be disabled and high voltage
removed from the array.
A flowchart to execute the burst program operation is shown in Figure 4-3.
WRITE TO FCDIV⁽¹⁾
(1) _{Required only once}
after reset.
BURST PROGRAM
FLOW
START
0
FACCERR?
1
CLEAR ERROR
0
FCBEF?
1
WRITE TO Flash
TO BUFFER ADDRESS AND DATA
WRITE COMMAND TO FCMD
WRITE 1 TO FCBEF
TO LAUNCH COMMAND
AND CLEAR FCBEF ⁽²⁾
(2) _{Wait at least four bus cycles}
before checking FCBEF or FCCF.
YES
FPVIOL OR
FACCERR?
YES
NO
NEW BURST COMMAND?
NO
0
FCCF?
1
DONE
ERROR EXIT
Figure 4-3. Burst Program Flowchart
MC9S08DZ60 Series Data Sheet, Rev. 4
56
Freescale Semiconductor