MC9S08DZ60CLH Datasheet, PDF (327/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 16 Timer/PWM Module (S08TPMV3)
When the TPM is configured for center-aligned PWM (and ELSnB:ELSnA not = 0:0), the data direction
for all channels in this TPM are overridden, the TPMxCHn pins are forced to be outputs controlled by the
TPM, and the ELSnA bits control the polarity of each TPMxCHn output. If ELSnB:ELSnA=1:0, the
corresponding TPMxCHn pin is cleared when the timer counter is counting up, and the channel value
register matches the timer counter; the TPMxCHn pin is set when the timer counter is counting down, and
the channel value register matches the timer counter. If ELSnA=1, the corresponding TPMxCHn pin is set
when the timer counter is counting up and the channel value register matches the timer counter; the
TPMxCHn pin is cleared when the timer counter is counting down and the channel value register matches
the timer counter.
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
TPMxCNTH:TPMxCNTL _{... 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 7 6 5 ...}
TPMxCHn
CHnF BIT
TOF BIT
Figure 16-5. High-True Pulse of a Center-Aligned PWM
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
TPMxCNTH:TPMxCNTL _{... 7 8 7 6 5 4}
TPMxCHn
321
01 2 3 4 5 6 7 8 7 6
5 ...
CHnF BIT
TOF BIT
Figure 16-6. Low-True Pulse of a Center-Aligned PWM
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
327