MC9S08DZ60CLH Datasheet, PDF (223/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

CAN node 1
MCU
CAN Controller
(MSCAN)
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
CAN node 2
CAN node n
TXCAN
RXCAN
Transceiver
CAN_H
CAN_L
CAN Bus
Figure 12-3. CAN System
12.3 Register Definition
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
12.3.1 MSCAN Control Register 0 (CANCTL0)
The CANCTL0 register provides various control bits of the MSCAN module as described below.
R
W
Reset:
7
RXFRM
0
6
RXACT
5
CSWAI
0
0
= Unimplemented
4
SYNCH
0
3
TIME
0
2
WUPE
0
1
SLPRQ
0
0
INITRQ
1
Figure 12-4. MSCAN Control Register 0 (CANCTL0)
NOTE
The CANCTL0 register, except WUPE, INITRQ, and SLPRQ, is held in the
reset state when the initialization mode is active (INITRQ = 1 and
INITAK = 1). This register is writable again as soon as the initialization
mode is exited (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime when out of initialization mode; exceptions are read-only RXACT and SYNCH, RXFRM
(which is set by the module only), and INITRQ (which is also writable in initialization mode).
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
223