MC9S08DZ60CLH Datasheet, PDF (130/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 7 Central Processor Unit (S08CPUV3)
Source
Form
RSP
RTI
RTS
SBC #opr8i
SBC opr8a
SBC opr16a
SBC oprx16,X
SBC oprx8,X
SBC ,X
SBC oprx16,SP
SBC oprx8,SP
SEC
SEI
STA opr8a
STA opr16a
STA oprx16,X
STA oprx8,X
STA ,X
STA oprx16,SP
STA oprx8,SP
STHX opr8a
STHX opr16a
STHX oprx8,SP
STOP
STX opr8a
STX opr16a
STX oprx16,X
STX oprx8,X
STX ,X
STX oprx16,SP
STX oprx8,SP
Table 7-2. Instruction Set Summary (Sheet 7 of 9)
Operation
Reset Stack Pointer (Low Byte)
SPL ← $FF
(High Byte Not Affected)
Return from Interrupt
SP ← (SP) + $0001; Pull (CCR)
SP ← (SP) + $0001; Pull (A)
SP ← (SP) + $0001; Pull (X)
SP ← (SP) + $0001; Pull (PCH)
SP ← (SP) + $0001; Pull (PCL)
Return from Subroutine
SP ← SP + $0001; Pull (PCH)
SP ← SP + $0001; Pull (PCL)
Subtract with Carry
A ← (A) – (M) – (C)
Set Carry Bit
(C ← 1)
Set Interrupt Mask Bit
(I ← 1)
Store Accumulator in Memory
M ← (A)
Store H:X (Index Reg.)
(M:M + $0001) ← (H:X)
Enable Interrupts: Stop Processing
Refer to MCU Documentation
I bit ← 0; Stop Processing
Store X (Low 8 Bits of Index Register)
in Memory
M ← (X)
Object Code
Cyc-by-Cyc
Details
Affect
on CCR
V11H INZC
INH
9C
1p
–11– ––––
INH
80
9 uuuuufppp
↕11↕ ↕↕↕↕
INH
81
5 ufppp
IMM
A2 ii
2 pp
DIR
B2 dd
3 rpp
EXT
C2 hh ll 4 prpp
IX2
D2 ee ff 4 prpp
IX1
E2 ff
3 rpp
IX
F2
3 rfp
SP2
9E D2 ee ff 5 pprpp
SP1
9E E2 ff
4 prpp
INH
99
1p
INH
9B
1p
DIR
B7 dd
3 wpp
EXT
C7 hh ll 4 pwpp
IX2
D7 ee ff 4 pwpp
IX1
E7 ff
3 wpp
IX
F7
2 wp
SP2
9E D7 ee ff 5 ppwpp
SP1
9E E7 ff
4 pwpp
DIR
35 dd
4 wwpp
EXT
96 hh ll 5 pwwpp
SP1
9E FF ff
5 pwwpp
INH
8E
2 fp...
DIR
BF dd
3 wpp
EXT
CF hh ll 4 pwpp
IX2
DF ee ff 4 pwpp
IX1
EF ff
3 wpp
IX
FF
2 wp
SP2
9E DF ee ff 5 ppwpp
SP1
9E EF ff
4 pwpp
–11– ––––
↕11– –↕↕↕
–11– –––1
–11– 1–––
011– –↕↕–
011– –↕↕–
–11– 0–––
011– –↕↕–
MC9S08DZ60 Series Data Sheet, Rev. 4
130
Freescale Semiconductor