MC9S08DZ60CLH Datasheet, PDF (17/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Section Number
Title
Page
Chapter 16
Timer Pulse-Width Modulator (S08TPMV3)
16.1 Introduction ....................................................................................................................................319
16.1.1 Features ...........................................................................................................................321
16.1.2 Modes of Operation ........................................................................................................321
16.1.3 Block Diagram ................................................................................................................322
16.2 Signal Description ..........................................................................................................................324
16.2.1 Detailed Signal Descriptions ...........................................................................................324
16.3 Register Definition .........................................................................................................................328
16.3.1 TPM Status and Control Register (TPMxSC) ................................................................328
16.3.2 TPM-Counter Registers (TPMxCNTH:TPMxCNTL) ....................................................329
16.3.3 TPM Counter Modulo Registers (TPMxMODH:TPMxMODL) ....................................330
16.3.4 TPM Channel n Status and Control Register (TPMxCnSC) ..........................................331
16.3.5 TPM Channel Value Registers (TPMxCnVH:TPMxCnVL) ..........................................333
16.4 Functional Description ...................................................................................................................334
16.4.1 Counter ............................................................................................................................335
16.4.2 Channel Mode Selection .................................................................................................337
16.5 Reset Overview ..............................................................................................................................340
16.5.1 General ............................................................................................................................340
16.5.2 Description of Reset Operation .......................................................................................340
16.6 Interrupts ........................................................................................................................................340
16.6.1 General ............................................................................................................................340
16.6.2 Description of Interrupt Operation ..................................................................................341
16.7 The Differences from TPM v2 to TPM v3.....................................................................................342
Chapter 17
Development Support
17.1 Introduction ....................................................................................................................................347
17.1.1 Forcing Active Background ............................................................................................347
17.1.2 Features ...........................................................................................................................348
17.2 Background Debug Controller (BDC) ...........................................................................................348
17.2.1 BKGD Pin Description ...................................................................................................349
17.2.2 Communication Details ..................................................................................................350
17.2.3 BDC Commands .............................................................................................................354
17.2.4 BDC Hardware Breakpoint .............................................................................................356
17.3 On-Chip Debug System (DBG) .....................................................................................................357
17.3.1 Comparators A and B ......................................................................................................357
17.3.2 Bus Capture Information and FIFO Operation ...............................................................357
17.3.3 Change-of-Flow Information ..........................................................................................358
17.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................358
17.3.5 Trigger Modes .................................................................................................................359
17.3.6 Hardware Breakpoints ....................................................................................................361
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
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