MC9S08DZ60CLH Datasheet, PDF (195/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
10.6 Application Information
This section contains information for using the ADC module in applications. The ADC has been designed
to be integrated into a microcontroller for use in embedded control applications requiring an A/D
converter.
10.6.1 External Pins and Routing
The following sections discuss the external pins associated with the ADC module and how they should be
used for best results.
10.6.1.1 Analog Supply Pins
The ADC module has analog power and ground supplies (V_DDAD and V_SSAD) available as separate pins
on some devices. V_SSAD is shared on the same pin as the MCU digital V_SS on some devices. On other
devices, V_SSAD and V_DDAD are shared with the MCU digital supply pins. In these cases, there are separate
pads for the analog supplies bonded to the same pin as the corresponding digital supply so that some degree
of isolation between the supplies is maintained.
When available on a separate pin, both V_DDAD and V_SSAD must be connected to the same voltage potential
as their corresponding MCU digital supply (V_DD and V_SS) and must be routed carefully for maximum
noise immunity and bypass capacitors placed as near as possible to the package.
If separate power supplies are used for analog and digital power, the ground connection between these
supplies must be at the V_SSAD pin. This should be the only ground connection between these supplies if
possible. The V_SSAD pin makes a good single point ground location.
10.6.1.2 Analog Reference Pins
In addition to the analog supplies, the ADC module has connections for two reference voltage inputs. The
high reference is V_REFH, which may be shared on the same pin as V_DDAD on some devices. The low
reference is V_REFL, which may be shared on the same pin as V_SSAD on some devices.
When available on a separate pin, V_REFH may be connected to the same potential as V_DDAD, or may be
driven by an external source between the minimum V_DDAD spec and the V_DDAD potential (V_REFH must
never exceed V_DDAD). When available on a separate pin, V_REFL must be connected to the same voltage
potential as V_SSAD. V_REFH and V_REFL must be routed carefully for maximum noise immunity and bypass
capacitors placed as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each successive
approximation step is drawn through the V_REFH and V_REFL loop. The best external component to meet this
current demand is a 0.1 μF capacitor with good high frequency characteristics. This capacitor is connected
between V_REFH and V_REFL and must be placed as near as possible to the package pins. Resistance in the
path is not recommended because the current causes a voltage drop that could result in conversion errors.
Inductance in this path must be minimum (parasitic only).
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
195