MC908AZ32ACFUE Datasheet, PDF (43/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 4
Flash Memory
4.1 Introduction
This section describes the operation of the embedded FLASH memory. This memory can be read,
programmed and erased from a single external supply. The program and erase operations are enabled
through the use of an internal charge pump.
4.2 Functional Description
The FLASH memory is an array of 32,256 bytes with one byte of block protection and an additional
52 bytes of user vectors. An erased bit reads as a logic 1 and a programmed bit reads as a logic 0.
Memory in the FLASH array is organized into rows within pages. There are two rows of memory per page
with 64 bytes per row. The minimum erase block size is a single page,128 bytes. Programming is
performed on a per-row basis, 64 bytes at a time. Program and erase operations are facilitated through
control bits in the FLASH Control Register (FLCR). Details for these operations appear later in this
section.
The FLASH memory map consists of:
• $8000–$FDFF: User Memory (32,256 bytes)
• $FF80: FLASH Block Protect Register (FLBPR)
• $FF88: FLASH Control Register (FLCR)
• $FFCC–$FFFF: these locations are reserved for user-defined interrupt and reset vectors (Please
see 2.4 Vector Addresses and Priority for details)
Programming tools are available from Freescale. Contact your local Freescale representative for more
information.
NOTE
A security feature prevents viewing of the FLASH contents.⁽¹⁾
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
unauthorized users.
MC68HC908AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
43