MC908AZ32ACFUE Datasheet, PDF (219/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

I/O Registers
MSxA — Mode Select Bit A
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation (see Table 19-2).
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
When ELSxB:A = 00, this read/write bit selects the initial output level of the TBCHx pin once PWM,
input capture or output compare operation is enabled (see Table 19-2). Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIMB status and control register (TBSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port F and pin PTFx/TBCHx is
available as a general-purpose I/O pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture, or output compare mode is
enabled. Table 19-2 shows how ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits.
MSxB:MSxA
X0
X1
00
00
00
01
01
01
1X
1X
1X
Table 19-2. Mode, Edge, and Level Selection
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Mode
Output Preset
Input Capture
Output
Compare
or PWM
Buffered
Output Compare
or Buffered PWM
Configuration
Pin under Port Control;
Initialize Timer
Output Level High
Pin under Port Control;
Initialize Timer
Output Level Low
Capture on Rising Edge Only
Capture on Falling Edge Only
Capture on Rising or Falling Edge
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
NOTE
Before enabling a TIMB channel register for input capture operation, make
sure that the PTFx/TBCHx pin is stable for at least two bus clocks.
MC68HC908AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
219