MC908AZ32ACFUE Datasheet, PDF (200/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module A (TIMA)
18.8.4 TIMA Channel Status and Control Registers
Each of the TIMA channel status and control registers:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare or PWM operation
• Selects high, low or toggling output on output compare
• Selects rising edge, falling edge or any edge as the active input capture trigger
• Selects output toggling on TIMA overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Register Name and Address
Bit 7
6
Read: CH0F
Write: 0
CH0IE
Reset: 0
0
TASC0 — $0026
5
4
MS0B MS0A
0
0
3
ELS0B
0
2
ELS0A
0
1
Bit 0
TOV0 CH0MAX
0
0
Register Name and Address
TASC1 — $0029
Bit 7
6
5
4
Read: CH1F
0
CH1IE
MS1A
Write: 0
R
Reset: 0
0
0
0
R
= Reserved
Register Name and Address
TASC2 — $002C
Bit 7
6
5
4
Read: CH2F
Write: 0
CH2IE
MS2B
MS2A
Reset: 0
0
0
0
3
ELS1B
0
2
ELS1A
0
3
ELS2B
0
2
ELS2A
0
1
Bit 0
TOV1 CH1MAX
0
0
1
Bit 0
TOV2 CH2MAX
0
0
Register Name and Address
Bit 7
6
Read: CH3F
Write: 0
CH3IE
Reset: 0
0
TASC3 — $002F
5
4
0
MS3A
R
0
0
3
ELS3B
0
2
ELS3A
0
1
Bit 0
TOV3 CH3MAX
0
0
R
= Reserved
Figure 18-7. TIMA Channel Status
and Control Registers (TASC0–TASC5)
MC68HC908AZ32A Data Sheet, Rev. 2
200
Freescale Semiconductor