MC908AZ32ACFUE Datasheet, PDF (257/324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port G
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 23-6 summarizes the operation of the port F pins.
Table 23-6. Port F Pin Functions
Accesses to
DDRF
PTF
I/O Pin
DDRF
Bit
Bit
Mode
Read/Write
0
X
Input, Hi-Z DDRF[6:0]
1
X
Output
DDRF[6:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTF
Read
Pin
PTF[6:0]
Write
PTF[6:0]⁽¹⁾
PTF[6:0]
23.8 Port G
Port G is a 3-bit special function port that shares all of its pins with the keyboard interrupt module (KBD).
Note that Port G is only available on 64-pin package options.
23.8.1 Port G Data Register
The port G data register contains a data latch for each of the three port G pins.
Address:
Read:
Write:
Reset:
Alternate
Function:
$000A
Bit 7
0
R
R
6
5
4
3
2
0
0
0
0
PTG2
R
R
R
R
Unaffected by Reset
KBD2
= Reserved
Figure 23-20. Port G Data Register (PTG)
1
PTG1
KBD1
Bit 0
PTG0
KBD0
PTG[2:0] — Port G Data Bits
These read/write bits are software programmable. Data direction of each port G pin is under the control
of the corresponding bit in data direction register G. Reset has no effect on PTG[2:0].
KBD[2:0] — Keyboard Wakeup pins
The keyboard interrupt enable bits, KBIE[2:0], in the keyboard interrupt control register, enable the port
G pins as external interrupt pins (See Chapter 22 Keyboard Module (KBD)). Enabling an external
interrupt pin will override the corresponding DDRGx.
MC68HC908AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
257