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MC908AZ32ACFUE Datasheet, PDF (299/324 Pages) Freescale Semiconductor, Inc – Microcontrollers
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Electrical Specifications
25.1.4 5.0 Volt DC Electrical Characteristics
Characteristic(1)
Symbol
Min
Typical
Max
Unit
Output High Voltage
(ILOAD = –2.0 mA) All Ports
(ILOAD = –5.0 mA) All Ports
VOH
VDD –0.8
—
VDD –1.5
—
—
V
—
Total source current
IOH(TOT)
—
—
10
mA
Output Low Voltage
(ILOAD = 1.6 mA) All Ports
(ILOAD = 10.0 mA) All Ports
VOL
—
—
0.4
V
—
—
1.5
Total sink current
IOL(TOT)
—
—
15
mA
Input High Voltage
All Ports, IRQs, RESET, OSC1
VIH
0.7 x VDD
—
VDD
V
Input Low Voltage
All Ports, IRQs, RESET, OSC1
VIL
VSS
—
0.3 x VDD
V
VDD Supply Current
Run(2)
Wait(3)
Stop(4)
LVI enabled, TA=25 °C
LVI disabled, TA=25 °C
LVI enabled, –40 °C to +125 °C
LVI disabled, –40 °C to +125 °C
—
25
35
mA
—
14
20
mA
IDD(5)
—
100
400
μA
—
35
50
μA
—
500
μA
—
100
μA
I/O Ports Hi-Z Leakage Current
IL
–1
1
μA
Input Current
IIN
–1
1
μA
Capacitance
Ports (As Input or Output)
COUT
—
CIN
—
12
8
pF
Low-Voltage Reset Inhibit (trip recover)
VLVI
3.80
4.49
V
POR ReArm Voltage(6)
VPOR
0
200
mV
POR Reset Voltage(7)
VPORRST
0
800
mV
POR Rise Time Ramp Rate(8)
RPOR
0.02
—
V/ms
High COP Disable Voltage(9)
VHI
VDD + 3.0
VDD + 4.5
V
Monitor mode entry voltage on IRQ(10)
VHI
VDD + 3.0
VDD + 4.5
V
Keyboard pullup resistor
RPU
20
90
200
kΩ
1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40 °C to +TA(MAX), unless otherwise noted.
2. Run (Operating) IDD measured using external square wave clock source (fBUS = 8.4 MHz). All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run IDD. Measured with all modules enabled. Typical values at midpoint of voltage range, 25C only.
3. Wait IDD measured using external square wave clock source (fBUS = 8.4 MHz). All inputs 0.2 Vdc from rail. No dc loads.
Less than 100 pF on all outputs, CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects
wait IDD. Measured with all modules enabled. Typical values at midpoint of voltage range, 25C only.
4. Stop IDD measured with OSC1 = VSS. Typical values at midpoint of voltage range, 25C only.
5. Although IDD is proportional to bus frequency, a current of several mA is present even at very low frequencies.
6. Maximum is highest voltage that POR is guaranteed.
7. Maximum is highest voltage that POR is possible.
8. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum
VDD is reached.
9. See Chapter 13 Computer Operating Properly (COP. VHI applied to RST.
10. See Monitor mode description within Chapter 13 Computer Operating Properly (COP. VHI applied to IRQ or RST
MC68HC908AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
299
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