DS80CH11 Datasheet, PDF (79/88 Pages) Dallas Semiconductor – System Energy Manager

DS80CH11
13.3.5 POWER CYCLE TIMING CHARACTERISTICS
PARAMETER
SYMBOL MIN
TYP
Cycle Start–up Time
t_CSU
1.8
Power–on Reset Delay
t_POR
(0°C to 70°C; V_CC=5.0 ± 10%)
MAX
UNITS NOTES
ms
1
65536
t_CLCL
2
NOTES:
1. Start–up time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592 MHz crys-
tal manufactured by Fox.
2. Reset delay is a synchronous counter of crystal oscillations after crystal start–up. At 25 MHz, this time is
2.62 ms.
EXTERNAL PROGRAM MEMORY READ CYCLE Figure 13–1
ALE
PSEN
t_LHLL
t_AVLL
t_LLIV
t_PLIV
t_PLPH
t_LLPL
t_LLAX1
t_PLAZ
t_PXIX
t_PXIZ
PORT 0
ADDRESS
A0–A7
t_AVIV1
t_AVIV2
INSTRUCTION
IN
PORT 2
ADDRESS A8–A15 OUT
ADDRESS
A0–A7
ADDRESS A8–A15 OUT
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