DS80CH11 Datasheet, PDF (5/88 Pages) Dallas Semiconductor – System Energy Manager

DS80CH11
1.0 GENERAL DESCRIPTION
1.1 OVERVIEW
The System Energy Manager is a highly integrated
microcontroller that provides several key features for
systems including key scanning and control, battery
and power management, as well as two 2–Wire serial
I/O Ports. It incorporates the Dallas 8051–compatible
high–speed microcontroller core which has been rede-
signed to eliminate wasted clock and memory cycles.
Every standard 8051 instruction is executed between
1.5 and 3 times faster than the original for the same
crystal speed. Looking at it another way, the high–
speed core achieves the same throughput as a stan-
dard 8051 while using much less power as a result of
fewer required clock cycles. As a result, the firmware
can easily support many tasks required by mobile sys-
tems within a single component.
The controller is designed to off–load battery and power
management tasks from the host CPU and thereby
make possible an efficient solution for systems. In addi-
tion to the microcontroller core, it incorporates an
8–channel, 10–bit A/D converter with external refer-
ence so that its firmware can perform battery manage-
ment tasks without burdening the host CPU. A four–
channel 8–bit pulse–width modulator allows digital
control of functions such as LCD contrast and bright-
ness. An 8–bit port is provided for key scan inputs. A
total of 88 parallel I/O pins are available for key scan-
ning, system configuration, and power management
control.
The System Energy Manager scans a key matrix and
interfaces to the host CPU via an 8042–compatible port.
The benefits of sophisticated power management and
permanently powered functions are thereby attained
without adding to the system’s chip count.
Two 2–wire, bi–directional serial buses are incorpo-
rated to facilitate the management of slave peripheral
devices on the motherboard, such as digital tempera-
ture sensors and potentiometers, and to support exter-
nal low–speed I/O devices such as monitor configura-
tion channels, pen tablets, and joysticks.
Because a direct interface to the X–bus is provided, the
controller is not dependent on a particular core logic
chip or chip set. Independent chip select inputs for the
keyboard controller, power management #1, and power
management #2 registers are provided.
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