DS80CH11 Datasheet, PDF (63/88 Pages) Dallas Semiconductor – System Energy Manager

DS80CH11
*Note: For channels 0 and 2, this selection assigns
PWI.0 as the input clock source. For channels 1 and 3,
this selection assigns PWI.1 as the input clock source.
clock selected by PWnS2–0. When PWnEN = 0, no
clock is generated.
PWnEN – PWM n Frequency Generator
Enable.
Enables the frequency generator for PWM n. When
PWnEN = 1, the frequency generator operates from the
11.5.2 PW01CON / PW23CON – PWM 0, 1 / PWM 2, 3 Control Register
PW01CON; SFR ADDR.=0DDH
BIT 7
BIT 6
BIT 5
PW0
F
PW0
DC
PW0
OE
BIT 4
PW0
T/C
BIT 3
PW1
F
BIT 2
PW1
DC
BIT 1
PW1
OE
BIT 0
PW1
T/C
PW23CON; SFR ADDR.=0EDH
BIT 7
BIT 6
BIT 5
PW2
F
PW2
DC
PW2
OE
BIT 4
PW2
T/C
BIT 3
PW3
F
BIT 2
PW3
DC
BIT 1
PW3
OE
BIT 0
PW3
T/C
Read/Write Access: Unrestricted.
Initialization: 00H on any type of reset
PWnF – PWM n Flag.
Indicates that the PWM n timer has rolled over to a zero
after a total of 256 counts. This bit must be cleared by
software to remove the flagged condition.
PWnDC – PWM n D. C. Override.
Setting this bit to a 1 forces the PWMn output to a 1
regardless of the PWM match value.
PWnOE – PWM n Output Enable.
When set to a 1, PWnOE enables the PWM channel’s
output on the associated port pin. The port pin’s normal
psuedo–bi–directional function is switched over to a full
complementary push–pull output drive. When cleared
to 0, the PWM function is disconnected, and the normal
port pin function is restored.
PWnT/C – PWM n Timer / Compare Value
Select.
PWnT/C controls whether the read/write access of the
PWM channel’s value register results in access of the
timer or the compare values. When PWnT/C = 1, the
Timer values are accessed via the PWM n SFR. When
PWnT/C = 0, the Compare values are accessed via the
PWM n SFR.
11.5.3 PWnFG – PWM n Frequency Generator Registers
PW0FG; SFR ADDR.=0D6H
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
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