DS80CH11 Datasheet, PDF (51/88 Pages) Dallas Semiconductor – System Energy Manager

7.8.4 ADLSB – A/D Result Least
Significant Byte
ADLSB; SFR ADDR.=0B5H
BIT 7
BIT 6
ADR7
ADR6
BIT 5
ADR5
BIT 4
ADR4
BIT 3
ADR3
BIT 2
ADR2
Read/Write Access: Unrestricted.
Initialization: 00h on any type of reset
ADLSB always returns the least significant 8–bits of the conversion result.
7.8.5 WINHI – A/D Window Comparator
High Byte
WINHI; SFR ADDR.=0B6H
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
ADR1
BIT 1
DS80CH11
BIT 0
ADR0
BIT 0
Read/Write Access: Unrestricted.
Initialization: 00h on any type of reset
Upper limit for the window comparator. These 8–bits
are compared against the most significant 8–bits of the
previous A/D result. A match of the desired magnitude
causes the comparator to set the WCM flag. The match
condition is selected by the WCIO bit in ADCON1.
7.8.6 WINLO – A/D Window Comparator Low Byte
WINLO; SFR ADDR.=0B7H
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Read/Write Access: Unrestricted.
Initialization: 00h on any type of reset
Lower limit for the window comparator. These 8–bits
are compared against the most significant 8–bits of the
previous A/D result. A match of the desired magnitude
causes the comparator to set the WCM flag. The match
condition is selected by the WCIO bit in ADCON1.
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