DS80CH11 Datasheet, PDF (44/88 Pages) Dallas Semiconductor – System Energy Manager

DS80CH11
7.0 A/D CONVERTER
7.1 OVERVIEW
A self–contained A/D converter is provided on the SEM.
Its major features are summarized below:
• 10–bit resolution
• True 9–bit accuracy: total error no greater than + 2
LSB’s
• Monotonic with no missing codes
• eight multiplexed inputs
• Shared analog/digital pins with 60 dB isolation
• Digital window comparator / alarm
• Low power consumption
The A/D subsystem consists of a 10–bit successive
approximation analog to digital converter, an 8 input
analog multiplexor, a programmable reference block, a
digital window comparator, and a control block as
depicted in Figure 7–1.
The multiplexor selects 1 of 8 analog inputs for conver-
sion. A conversion is initiated either by a software or
hardware generated start of conversion signal. An
optional mode enables continuous conversions on a
selected channel. At the completion of a conversion the
A/D generates an end of conversion signal indicating
that the conversion is complete and the results may be
read. An end of conversion can also be used to gener-
ate an interrupt.
After the conversion is complete, the 10–bit result is
available in two registers. In order to accommodate a
variety of applications, the A/D result can be pro-
grammed to be presented either as eight msbs and
eight lsbs in separate registers, or as a right justified
10–bit result with the most significant two bits of the
result right–justified in the most significant byte. An A/D
conversion can be performed in a minimum of 16 µsec.
An interrupt can be programmed to occur at the end of a
conversion.
A digital window comparator is available to allow auto-
matic monitoring of external signals without burdening
the software. The window comparator allows software
to select an upper and lower limit for comparison. In
addition, the hardware can be programmed to look
inside or outside of the window. By adjusting the win-
dow location, the hardware can automatically look for
results that are above a number, below a number, inside
of a range, or outside of a range. When the window
comparator qualifier function is used, an end–of–con-
version interrupt will only be generated when selected
criteria for the conversion result has been met.
7.2 ANALOG POWER / SLEEP MODE
The A/D block provides separate power and ground
pins to provide power to the analog circuits. This allows
the A/D to operate from a clean supply if available. Ana-
log power is supplied through AVCC and AGND. While
these pins do supply power, they are not the source of
the A/D reference. The converter will draw a maximum
of 1 mA during full operation.
A minimum time of t_AD required for the analog circuitry to
stabilize. The ADON bit is cleared to 0 following a reset
– leaving the A/D converter powered down.
011200 44/88