DS80CH11 Datasheet, PDF (38/88 Pages) Dallas Semiconductor – System Energy Manager

DS80CH11
DATA TRANSFER ON EITHER 2–WIRE BUS Figure 6–3
SDAx
MSB
SLAVE ADDRESS
R/W
DIR. BIT
ACK
FROM
RECEIVER
NAK
FROM
RECEIVER
ACK
FROM
RECEIVER
SCLx
1
START
CONDITION
2
3, 6
7
8
9
ACK
CLOCK LINE HELD LOW
XMIT: UNTIL SHIFT REG. LOAD
RECEIVE: REC. BUF. FULL
1
2
3, 8
9
ACK
REPEATED FOR
MULTI–BYTE XFERS
CONDITION
STOP
REPEAT
START
STOP OR
REPEAT START
CONDITION
6.3.1 Master Transmit
In the master transmit mode, the SEM is configured as a
master device and transfers a number of data bytes to a
slave receiver. A timing diagram in Figure 6–4 illus-
trates the interaction between the firmware and hard-
ware with respect to events on the 2–Wire bus.
The master transmit mode can now be entered by set-
ting the STAx bit. The 2–Wire port logic will test the
2–Wire bus and generate a start condition as soon as
the bus is free. As soon as the start condition is trans-
mitted, the TSTAx flag will be set. In addition, the X/Rx
bit will be set to a 1, indicating transmit operation is in
effect.
In response to TSTAx being set, the firmware can now
write to the transmit buffer an initial byte for the message
as follows:
7654321 0
7–bit Slave Address
0
MASTER TRANSMIT OPERATION TIMING Figure 6–4
ÇÇÉÉÇÇÉÉÉÉÇÇÉÉÇÇÇÇÇÇÇÇÇÇÇÇÇÇÉÉÇÇÉÉÉÉÇÇÉÉÇÇÇÇÇÇÇÇÇÇÇÇ ^SDAx/SCLx
S SLAVE ADDR. R/W A DATA A DATA A/A Sr SLAVE ADDR. R/W A DATA A/A P
0
0
STAx BIT
X/Rx BIT
TSTAx BIT
XMIT BUF
WRITE
TXIx BIT
ACKSx BIT
STOx BIT
ACTION TAKEN BY FIRMWARE
ALTERNATIVE CONDITION
ÇÇÇMASTER TO SLAVE XFER
SLAVE TO MASTER XFER
A = ACKNOWLEDGE (SDAx LOW)
A = NEGATIVE ACKNOWLEDGE (SDAx HIGH)
S = START CONDITION
Sr = REPEAT START CONDITION
P = STOP CONDITION
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