EP3SL50 Datasheet, PDF (84/341 Pages) Altera Corporation – Stratix III Device Handbook, Volume 2

1–74
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–53. EP3SL70 Column Pins Output Timing Parameters (Part 4 of 7)
I/O
Standard
Clock
1.2 V
SSTL-2
CLASS I
SSTL-2
CLASS II
SSTL-18
CLASS I
GCLK t_co
2mA _GCLK
PLL ^tco
GCLK t_co
4mA _GCLK
PLL ^tco
GCLK t_co
6mA _GCLK
PLL ^tco
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
10mA _GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
GCLK t_co
16mA _GCLK
PLL ^tco
GCLK t_co
4mA _GCLK
PLL ^tco
GCLK t_co
6mA _GCLK
PLL ^tco
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
10mA _GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.240
3.240 4.665 5.087 5.624 5.503 5.711 5.087 5.624 5.503 5.711 ns
3.567
3.567 5.149 5.616 6.221 6.078 6.363 5.616 6.221 6.078 6.363 ns
3.118
3.118 4.440 4.827 5.338 5.217 5.425 4.827 5.338 5.217 5.425 ns
3.444
3.444 4.923 5.354 5.935 5.792 6.078 5.354 5.935 5.792 6.078 ns
3.080
3.080 4.347 4.737 5.225 5.104 5.312 4.737 5.225 5.104 5.312 ns
3.406
3.406 4.831 5.265 5.822 5.679 5.964 5.265 5.822 5.679 5.964 ns
3.031
3.031 4.318 4.687 5.169 5.048 5.256 4.687 5.169 5.048 5.256 ns
3.359
3.359 4.803 5.216 5.766 5.623 5.917 5.216 5.766 5.623 5.917 ns
3.032
3.032 4.275 4.634 5.100 4.979 5.187 4.634 5.100 4.979 5.187 ns
3.359
3.359 4.760 5.163 5.697 5.554 5.874 5.163 5.697 5.554 5.874 ns
3.029
3.029 4.272 4.630 5.096 4.975 5.183 4.630 5.096 4.975 5.183 ns
3.356
3.356 4.757 5.160 5.693 5.550 5.869 5.160 5.693 5.550 5.869 ns
3.028
3.028 4.272 4.631 5.097 4.976 5.184 4.631 5.097 4.976 5.184 ns
3.354
3.354 4.757 5.161 5.694 5.551 5.870 5.161 5.694 5.551 5.870 ns
3.019
3.019 4.259 4.617 5.082 4.961 5.169 4.617 5.082 4.961 5.169 ns
3.345
3.345 4.742 5.145 5.679 5.536 5.854 5.145 5.679 5.536 5.854 ns
3.039
3.039 4.287 4.648 5.116 4.995 5.203 4.648 5.116 4.995 5.203 ns
3.366
3.366 4.772 5.177 5.713 5.570 5.893 5.177 5.713 5.570 5.893 ns
3.035
3.035 4.285 4.646 5.114 4.993 5.201 4.646 5.114 4.993 5.201 ns
3.362
3.362 4.770 5.175 5.711 5.568 5.891 5.175 5.711 5.568 5.891 ns
3.025
3.025 4.276 4.637 5.105 4.984 5.192 4.637 5.105 4.984 5.192 ns
3.351
3.351 4.760 5.166 5.702 5.559 5.889 5.166 5.702 5.559 5.889 ns
3.013
3.013 4.263 4.624 5.092 4.971 5.179 4.624 5.092 4.971 5.179 ns
3.340
3.340 4.747 5.153 5.689 5.546 5.864 5.153 5.689 5.546 5.864 ns
3.013
3.013 4.263 4.624 5.092 4.971 5.179 4.624 5.092 4.971 5.179 ns
3.340
3.340 4.747 5.153 5.689 5.546 5.863 5.153 5.689 5.546 5.863 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation