EP3SL50 Datasheet, PDF (140/341 Pages) Altera Corporation – Stratix III Device Handbook, Volume 2

1–130
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–73. EP3SL150 Column Pins Output Timing Parameters (Part 7 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
1.5-V
HSTL
CLASS II
GCLK t_co
16mA _GCLK
PLL ^tco
3.250
3.673
3.267
3.669
4.605 4.969 5.470 5.318 5.653 4.969 5.470 5.318 5.653 ns
5.192 5.634 6.186 6.006 6.388 5.634 6.186 6.006 6.388 ns
GCLK t_co 3.269
4mA
GCLK
PLL ^tco
3.692
3.286
3.688
4.641 5.010 5.516 5.364 5.699 5.010 5.516 5.364 5.699 ns
5.228 5.675 6.232 6.052 6.434 5.675 6.232 6.052 6.434 ns
GCLK t_co 3.261
6mA
GCLK
PLL ^tco
3.684
3.278
3.680
4.632 5.001 5.507 5.355 5.690 5.001 5.507 5.355 5.690 ns
5.219 5.666 6.223 6.043 6.425 5.666 6.223 6.043 6.425 ns
1.2-V
HSTL
CLASS I
GCLK t_co
8mA _GCLK
PLL ^tco
3.262
3.685
3.279
3.681
4.640 5.010 5.516 5.364 5.699 5.010 5.516 5.364 5.699 ns
5.227 5.675 6.232 6.052 6.434 5.675 6.232 6.052 6.434 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.251
3.674
3.268
3.670
4.627 4.996 5.502 5.350 5.685 4.996 5.502 5.350 5.685 ns
5.214 5.661 6.218 6.038 6.420 5.661 6.218 6.038 6.420 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.251
3.674
3.268
3.670
4.627 4.996 5.503 5.351 5.686 4.996 5.503 5.351 5.686 ns
5.214 5.661 6.219 6.039 6.421 5.661 6.219 6.039 6.421 ns
1.2-V
HSTL
CLASS II
GCLK t_co
16mA _GCLK
PLL ^tco
3.272
3.695
3.289
3.691
4.643 5.011 5.516 5.364 5.699 5.011 5.516 5.364 5.699 ns
5.230 5.676 6.233 6.052 6.434 5.676 6.233 6.052 6.434 ns
3.0-V PCI —
GCLK t_co
GCLK
PLL ^tco
3.375
3.798
3.392
3.794
4.688 5.045 5.541 5.389 5.724 5.045 5.541 5.389 5.724 ns
5.275 5.710 6.264 6.077 6.459 5.710 6.264 6.077 6.459 ns
3.0-V
PCI-X
GCLK t_co 3.375
—
GCLK
PLL ^tco
3.798
3.392
3.794
4.688 5.045 5.541 5.389 5.724 5.045 5.541 5.389 5.724 ns
5.275 5.710 6.264 6.077 6.459 5.710 6.264 6.077 6.459 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation