|
EP3SL50 Datasheet, PDF (262/341 Pages) Altera Corporation – Stratix III Device Handbook, Volume 2 | |||
|
◁ |
1â252
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1â118 lists the EP3SE80 row pins output timing parameters for differential I/O
standards.
Table 1â118. EP3SE80 Row Pins Output Timing Parameters (Part 1 of 3)
I/O Standard
LVDS
â
LVDS_E_1R â
LVDS_E_3R â
MINI-LVDS â
MINI-
LVDS_E_1R
â
MINI-
LVDS_E_3R
â
RSDS
â
RSDS_E_1R â
RSDS_E_3R â
4mA
DIFFERENTIAL
1.2-V
6mA
HSTL CLASS I
8mA
Clock
Fast Model
C2
Industrial
Commercial
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL= VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL= VCCL=
1.1 V 0.9 V
Units
GCLK tco
GCLK
PLL tco
2.744
0.931
2.932
1.057
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107 ns
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456 ns
GCLK tco
GCLK
PLL tco
3.136
1.333
3.376
1.511
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871 ns
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229 ns
GCLK tco
GCLK
PLL tco
3.118
1.315
3.366
1.501
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932 ns
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290 ns
GCLK tco
GCLK
PLL tco
2.744
0.931
2.932
1.057
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107 ns
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456 ns
GCLK tco
GCLK
PLL tco
3.136
1.333
3.376
1.511
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871 ns
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229 ns
GCLK tco
GCLK
PLL tco
3.118
1.315
3.366
1.501
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932 ns
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290 ns
GCLK tco
GCLK
PLL tco
2.744
0.931
2.932
1.057
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107 ns
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456 ns
GCLK tco
GCLK
PLL tco
3.136
1.333
3.376
1.511
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871 ns
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229 ns
GCLK tco
GCLK
PLL tco
3.118
1.315
3.366
1.501
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932 ns
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290 ns
GCLK tco
GCLK
PLL tco
3.162
1.359
3.409
1.544
4.828 5.236 5.751 5.613 5.884 5.365 5.880 5.742 5.961 ns
2.004 2.106 2.318 2.332 2.330 2.217 2.433 2.442 2.319 ns
GCLK tco
GCLK
PLL tco
3.148
1.345
3.395
1.530
4.815 5.223 5.738 5.600 5.871 5.351 5.867 5.729 5.948 ns
1.991 2.093 2.305 2.319 2.317 2.203 2.420 2.429 2.306 ns
GCLK tco
GCLK
PLL tco
3.144
1.341
3.391
1.526
4.813 5.223 5.739 5.601 5.872 5.351 5.869 5.731 5.950 ns
1.989 2.093 2.306 2.320 2.318 2.203 2.422 2.431 2.308 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation
|
▷ |