EP3SL50 Datasheet, PDF (323/341 Pages) Altera Corporation – Stratix III Device Handbook, Volume 2

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–313
Table 1–152 and Table 1–153 list the periphery clock timing parameters for EP3SL70
devices.
Table 1–152. EP3SL70 Column Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.465
1.465
-0.068
-0.068
1.468
1.468
-0.083
-0.083
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.142 2.410 2.792
2.142 2.410 2.792
-0.330 -0.370 -0.334
-0.330 -0.370 -0.334
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.673 3.220
2.673 3.220
-0.288 -0.133
-0.288 -0.133
I3
V_CCL=
1.1 V
2.410
2.410
-0.370
-0.370
I4
V_CCL=
1.1 V
2.802
2.802
0.273
0.273
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.673 3.220
2.673 3.220
-0.288 -0.133
-0.288 -0.133
Units
ns
ns
ns
ns
Table 1–153. EP3SL70 Row Pin Periphery Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.482
1.400
-0.019
-0.101
1.558
1.467
0.039
-0.052
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.227 2.488 2.851
2.082 2.325 2.670
-0.225 -0.302 -0.291
-0.367 -0.465 -0.472
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.727 3.031
2.556 2.872
-0.235 -0.295
-0.406 -0.454
I3
V_CCL=
1.1 V
2.539
2.369
-0.261
-0.431
I4
V_CCL=
1.1 V
2.905
2.716
0.376
0.187
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.777 3.056
2.598 2.897
-0.188 -0.257
-0.367 -0.416
Units
ns
ns
ns
ns
EP3SL110 Clock Timing Parameters
Table 1–154 and Table 1–155 list the global clock timing parameters for EP3SL110
devices.
.
Table 1–154. EP3SL110 Column Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.909
1.909
-0.048
-0.048
1.907
1.907
-0.050
-0.050
C2
V_CCL=
1.1 V
2.674
2.674
-0.274
-0.274
C3
V_CCL=
1.1 V
2.936
2.936
-0.330
-0.330
C4
V_CCL=
1.1 V
3.285
3.285
-0.290
-0.290
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.182 3.700
3.182 3.700
-0.251 -0.032
-0.251 -0.032
I3
V_CCL=
1.1 V
2.936
2.936
-0.330
-0.330
I4
V_CCL=
1.1 V
3.285
3.285
-0.290
-0.290
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.182 3.700
3.182 3.700
-0.251 -0.032
-0.251 -0.032
Units
ns
ns
ns
ns
Table 1–155. EP3SL110 Row Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Industrial
Commercial
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
Unit
1.882
2.014
2.754 2.975 3.344 3.221 3.511 3.062 3.413 3.287 3.551 ns
1.800
1.923
2.612 2.812 3.163 3.050 3.352 2.892 3.224 3.108 3.392 ns
-0.002
0.059 -0.202 -0.271 -0.231 -0.184 -0.212 -0.219 -0.184 -0.138 -0.260 ns
-0.084
-0.032 -0.347 -0.434 -0.412 -0.355 -0.371 -0.389 -0.373 -0.317 -0.419 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2