EP3SL50 Datasheet, PDF (112/341 Pages) Altera Corporation – Stratix III Device Handbook, Volume 2

1–102
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–63. EP3SL110 Column Pins Output Timing Parameters (Part 5 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
SSTL-2
CLASS II
GCLK t_co
16mA _GCLK
PLL ^tco
3.270
3.660
3.270
3.660
4.616 4.998 5.494 5.363 5.657 4.998 5.494 5.363 5.657 ns
5.191 5.630 6.182 6.024 6.406 5.630 6.182 6.024 6.406 ns
GCLK t_co 3.291
4mA
GCLK
PLL ^tco
3.681
3.291
3.681
4.645 5.030 5.528 5.397 5.691 5.030 5.528 5.397 5.691 ns
5.221 5.662 6.216 6.058 6.440 5.662 6.216 6.058 6.440 ns
GCLK t_co 3.287
6mA
GCLK
PLL ^tco
3.677
3.287
3.677
4.643 5.028 5.526 5.395 5.689 5.028 5.526 5.395 5.689 ns
5.219 5.660 6.214 6.056 6.438 5.660 6.214 6.056 6.438 ns
GCLK t_co 3.276
SSTL-18
CLASS I
8mA
GCLK
PLL ^tco
3.666
3.276
3.666
4.633 5.018 5.517 5.386 5.680 5.018 5.517 5.386 5.680 ns
5.209 5.651 6.205 6.047 6.429 5.651 6.205 6.047 6.429 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.265
3.655
3.265
3.655
4.621 5.005 5.504 5.373 5.667 5.005 5.504 5.373 5.667 ns
5.196 5.638 6.192 6.034 6.416 5.638 6.192 6.034 6.416 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.265
3.655
3.265
3.655
4.620 5.005 5.504 5.373 5.667 5.005 5.504 5.373 5.667 ns
5.196 5.638 6.192 6.034 6.416 5.638 6.192 6.034 6.416 ns
SSTL-18
CLASS II
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
16mA _GCLK
PLL ^tco
3.271
3.661
3.274
3.664
3.271
3.661
3.274
3.664
4.619 5.002 5.499 5.368 5.662 5.002 5.499 5.368 5.662 ns
5.195 5.635 6.187 6.029 6.411 5.635 6.187 6.029 6.411 ns
4.627 5.012 5.511 5.380 5.674 5.012 5.511 5.380 5.674 ns
5.203 5.644 6.199 6.041 6.423 5.644 6.199 6.041 6.423 ns
GCLK t_co 3.295
4mA
GCLK
PLL ^tco
3.685
3.295
3.685
4.655 5.041 5.541 5.410 5.704 5.041 5.541 5.410 5.704 ns
5.230 5.674 6.229 6.071 6.453 5.674 6.229 6.071 6.453 ns
GCLK t_co 3.281
6mA
GCLK
PLL ^tco
3.671
3.281
3.671
4.644 5.031 5.532 5.401 5.695 5.031 5.532 5.401 5.695 ns
5.220 5.664 6.220 6.062 6.444 5.664 6.220 6.062 6.444 ns
GCLK t_co 3.270
SSTL-15
CLASS I
8mA
GCLK
PLL ^tco
3.660
3.270
3.660
4.631 5.017 5.518 5.387 5.681 5.017 5.518 5.387 5.681 ns
5.206 5.650 6.206 6.048 6.430 5.650 6.206 6.048 6.430 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.269
3.659
3.269
3.659
4.634 5.021 5.522 5.391 5.685 5.021 5.522 5.391 5.685 ns
5.209 5.653 6.210 6.052 6.434 5.653 6.210 6.052 6.434 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.266
3.656
3.266
3.656
4.628 5.015 5.516 5.385 5.679 5.015 5.516 5.385 5.679 ns
5.204 5.648 6.204 6.046 6.428 5.648 6.204 6.046 6.428 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation