AMG-XB404 Datasheet, PDF (8/73 Pages) alpha microelectronics gmbh – Fully Integrated Single Motor Controller for Electrical Motors

AMG-XB404
Fully Integrated Single Motor Controller for Electrical Motors
waveforms for all commands are shown below.
A digital low-pass filter function can be activated for all inputs of the System SPI unit in order to
improve noise rejection, see also section 5.2 p. 9. The maximum usable clock frequency of the
System SPI unit will be reduced as the filter depth is increased.
The 8 bit write command contains 3 command bits followed by the 5 bit address of the register to
be written to and 8 bits of data (see figure 4).
SCLK
SCS
SDI
C[2] C[1] C[0] A[4]
A[0] D[7]
D[0] P
SDO
RDY
Figure 4: Command 1, write (8 bit)
The 8 bit read command requests the content of a register. The System SPI responds by setting
SDO to HIGH when data is ready and returning 8 bits of data starting with the second negative
edge of SCLK (see figure 5).
SCLK
SCS
SDI
C[2] C[1] C[0] A[4] A[0] P
SDO
Figure 5: Command 2, read (8 bit)
RDY D[7]
D[0] P
Command 3 writes 8 bits of data into a register and will not return a ready status until the LSB of
the previously written register becomes 0. This command is used when synchronization with units
running at a different clock frequency, such as the DMCE core, is required (see figure 6).
SCLK
SCS
SDI
C[2] C[1] C[0] A[4] A[0] D[7]
D[0] P
SDO
RDY
Figure 6: Command 3, write/read (8 bit)
Command 4 reads a 32 bit DMCE data register value in a single transmission cycle which allows
for higher effective data rates than using a series of 8 bit reads and writes, see section 5.4.4 p. 24
for the description of DMCE register reads. As shown in figure 7 a 5 bit DMCE base address and
an 8 bit register address R[7:0] are sent by the master and a 32 bit wide reply is returned by the
System SPI unit.
AMG-XB404
Revision: A
2. Nov. 2012 © All rights reserved
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