AMG-XB404 Datasheet, PDF (64/73 Pages) alpha microelectronics gmbh – Fully Integrated Single Motor Controller for Electrical Motors

AMG-XB404
Fully Integrated Single Motor Controller for Electrical Motors
Mnemonic
Operands
Description
Operation
ASR
Rd
Arithmetic shift right
C ← Rd[0], Rd[n] ← Rd[n+1], Rd[7] ← Rd[7]
0 ≤ d ≤ 31
SWAP
Rd
Swap nibbles
Rd[3:0] ← Rd[7:4], Rd[7:4] ← Rd[3:0]
0 ≤ d ≤ 31
BSET
s
Flag set
SREG[s] ← 1
0≤s≤7
BCLR
s
Flag clear
SREG[s] ← 0
0≤s≤7
BST
Rr, b
Store bit from register to T
T ← Rr[b]
0 ≤ r ≤ 31
0≤b≤7
BLD
Rd, b
Load bit from T to register
Rd[b] ← T
0 ≤ r ≤ 31
0≤b≤7
SEC
Set carry
C←1
CLC
Clear carry
C←0
SEN
Set negative flag
N←1
CLN
Clear negative flag
N←0
SEZ
Set zero flag
Z←1
CLZ
Clear zero flag
Z←0
SEI
Global interrupt enable
N←1
CLI
Global interrupt disable
N←0
SES
Set signed test flag
S←1
CLS
Clear signed test flag
S←0
SEV
Set twos complement overflow
V←1
CLV
Clear twos complement overflow
V←0
SET
Set T in SREG
T←1
CLT
Clear T in SREG
T←0
SEH
Set half carry flag in SREG
H←1
CLH
Clear half carry flag in SREG
H←0
MCU CONTROL INSTRUCTIONS
NOP
No operation
SLEEP
Sleep
WDR
Watchdog reset
Table 35: MCU instruction set, W denotes number of program words, N denotes number of clock cycles
Flags
Z,C,N,V,S
None
SREG[s]
SREG[s]
T
None
C
C
N
N
Z
Z
I
I
S
S
V
V
T
T
H
H
WN
11
11
11
11
11
Binary Opcode
1001 010d dddd 0101
1001 010d dddd 0010
1001 0100 0sss 1000
1001 0100 1sss 1000
1111 101d dddd 0bbb
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111 100d dddd 0bbb
1001 0100 0000 1000
1001 0100 1000 1000
1001 0100 0010 1000
1001 0100 1010 1000
1001 0100 0001 1000
1001 0100 1001 1000
1001 0100 0111 1000
1001 0100 1111 1000
1001 0100 0100 1000
1001 0100 1100 1000
1001 0100 0011 1000
1001 0100 1011 1000
1001 0100 0110 1000
1001 0100 1110 1000
1001 0100 0101 1000
1001 0100 1101 1000
None
None
None
11
11
11
0000 0000 0000 0000
1001 0101 1000 1000
1001 0101 1010 1000
AMG-XB404
Revision: A
6. Nov. 2012
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