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AMG-XB404 Datasheet, PDF (55/73 Pages) alpha microelectronics gmbh – Fully Integrated Single Motor Controller for Electrical Motors
AMG-XB404
Fully Integrated Single Motor Controller for Electrical Motors
5.8. System Clock
The AMG-XB404 system clock's features:
 supports three different system clock modes
 nominal 64MHz system clock
 internally generated clock can be put out to feed external circuitry
XO
8MHz
XO_OSEL
CLKSEL
CLKO
CLKI
CXO
s1
÷256 CXOCLK
Dec.
RC-
Ramp
RCOUT
RCRES
FLL
s1 s2
VCO
÷8
MCU
(8MHz)
s2
64 MHz
DMCE
PFC
ADAQ
Figure 38: Oscillator and FLL block schematic
The clock mode is set by connecting the CLKSEL and XO_OSEL pin to D5V or DGND as shown in
table 31:
• On-chip RC-ramp-based, Frequency Locked Loop (FLL) -controlled, VCO-generated on-
chip clock
• Crystal or resonator oscillator-based, FLL-controlled, VCO-generated on-chip clock
• Clock input from external clock input pin
CLKSEL
0
XO_OSEL
0
CLKIO
Input
Description
External clock input signal via CLKIO pin
0
1
Output/Off Internal RC-ramp based clock generation
1
(Crystal)
Output/Off Internal crystal/resonator based clock generation
Table 31: Clock source configuration
The recommended clock source of the IC uses an integrated RC-ramp of nominally 60 µs for
adjusting the on-chip VCO. As shown in figure Fehler: Referenz nicht gefunden this ramp signal
serves as the time standard for the FLL block which generates the system clock. The FLL block
uses a 13 bit wide divider ratio specifying the number of VCO clock cycles per RC-ramp. The MCU
clock frequency is generated by dividing the VCO's clock frequency by eight, consequently all
system clocks are in-phase signals.
Initially, the FLL divider ratio is set to 2048, resulting in an approximately 48 MHz clock output for a
typical RC-ramp at room temperature. The FLL’s divider ratio is trimmed via the IO port expander
(see section 5.2 p. 9) to achieve the target clock frequency of 64MHz.
A clock rate error of less than ±2% over the operating temperature range can be achieved by
AMG-XB404
Revision: A
2. Nov. 2012 © All rights reserved
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