AMG-XB404 Datasheet, PDF (60/73 Pages) alpha microelectronics gmbh – Fully Integrated Single Motor Controller for Electrical Motors

AMG-XB404
Fully Integrated Single Motor Controller for Electrical Motors
Mnemonic
Operands
Description
ARITHMETIC AND LOGIC INSTRUCTIONS
ADD
Rd, Rr
Add two registers
ADC
Rd, Rr
Add with carry two registers
ADIW
Rdl, K
Add immediate to word
SUB
SUBI
SBC
SBCI
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Subtract two registers
Subtract constant from register
Subtract with carry two registers
Subtract constant from register with carry
SBIW
Rdl, K
Subtract immediate from word
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
CBR
INC
DEC
TST
CLR
SER
MUL
MULS
MULSU
FMUL
FMULS
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Rd
Rd,K
Rd,K
Rd
Rd
Rd
Rd
Rd
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Logical AND registers
Logical AND register and constant
Logical OR registers
Logical OR register and constant
Exclusive OR registers
One’s complement
Two’s complement
Set Bit(s) in Register
Clear Bit(s) in Register
Increment
Decrement
Test for zero or minus
Clear register
Set register
Multiply unsigned
Multiply signed
Multiply signed with unsigned
Fractional multiply unsigned
Fractional multiply signed
Operation
Rd ← Rd + Rr
Rd ← Rd + Rr + C
Rdh:Rdl ← Rdh:Rdl + K
Rd ← Rd - Rr
Rd ← Rd – K
Rd ← Rd – Rr - C
Rd ← Rd – K - C
Rdh:Rdl ← Rdh:Rdl + K
Rd ← Rd & Rr
Rd ← Rd & K
Rd ← Rd | Rr
Rd ← Rd | K
Rd ← Rd ^ Rr
Rd ← 8’hFF - Rd
Rd ← 8’h00 - Rd
Rd ← Rd I K
Rd ← Rd & (8’hFF - K)
Rd ← Rd + 1
Rd ← Rd - 1
Rd ← Rd & Rd
Rd ← Rd ^ Rd
Rd ← 8’hFF
R1:R0 ← Rd * Rr
R1:R0 ← Rd * Rr
R1:R0 ← Rd * Rr
R1:R0 ← (Rd * Rr) << 1
R1:R0 ← (Rd * Rr) << 1
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
d = 24, 26, 28, 30;
0 ≤ K ≤ 63
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
d = 24, 26, 28, 30;
0 ≤ K ≤ 63
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
0 ≤ d ≤ 31
0 ≤ d ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
0 ≤ d ≤ 31
0 ≤ d ≤ 31
0 ≤ d ≤ 31
0 ≤ d ≤ 31
16 ≤ d ≤ 31
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 16 ≤ r ≤ 31
16 ≤ d ≤ 23; 16 ≤ r ≤ 23
16 ≤ d ≤ 23; 16 ≤ r ≤ 23
16 ≤ d ≤ 23; 16 ≤ r ≤ 23
Flags
W N Binary Opcode
Z,C,N,V,H,S 1 1
Z,C,N,V,H,S 1 1
Z,C,N,V,S
11
Z,C,N,V,H,S 1 1
Z,C,N,V,H,S 1 1
Z,C,N,V,H,S 1 1
Z,C,N,V,H,S 1 1
Z,C,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,C,N,V,S
11
Z,C,N,V,H,S 1 1
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
Z,N,V,S
11
None
11
Z,C
11
Z,C
11
Z,C
11
Z,C
11
Z,C
11
0000 11rd dddd rrrr
0001 11rd dddd rrrr
1001 0110 KKdd KKKK
0001 10rd dddd rrrr
0101 KKKK dddd KKKK
0000 10rd dddd rrrr
0100 KKKK dddd KKKK
1001 0111 KKdd KKKK
0010 00rd dddd rrrr
0111 KKKK dddd KKKK
0010 10rd dddd rrrr
0110 KKKK dddd KKKK
0010 01rd dddd rrrr
1001 010d dddd 0000
1001 010d dddd 0001
0110 KKKK dddd KKKK
0110 !K!K!K!K dddd !K!K!K!K
1001 010d dddd 0011
1001 010d dddd 1010
0010 00dd dddd dddd
0010 01dd dddd dddd
1110 1111 dddd 1111
1001 11rd dddd rrrr
0000 0010 dddd rrrr
0000 0011 0ddd 0rrr
0000 0011 0ddd 1rrr
0000 0011 1ddd 0rrr
AMG-XB404
Revision: A
6. Nov. 2012
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