AMG-XB404 Datasheet, PDF (61/73 Pages) alpha microelectronics gmbh – Fully Integrated Single Motor Controller for Electrical Motors

Mnemonic
Operands
FMULSU
Rd, Rr
BRANCH INSTRUCTIONS
RJMP
k
IJMP
k
JMP
k
RCALL
k
ICALL
k
CALL
k
RET
RETI
CPSE
CP
CPC
CPI
SBRC
SBRS
SBIC
SBIS
BRBS
BRBC
BREQ
BRNE
BRCS
BRCC
BRSH
BRLO
BRMI
BRPL
Rd, Rr
Rd, Rr
Rd, Rr
Rd, K
Rr, b
Rr, b
A, b
A, b
s, k
s, k
k
k
k
k
k
k
k
k
Description
Fractional signed by unsigned multiply
Relative jump
Indirect jump to (Z)
Direct jump
Relative subroutine call
Indirect call to (Z)
Direct subroutine call
Subroutine return
Interrupt return
Compare, skip if equal
Compare
Compare with carry
Compare register with immediate
Skip if bit in register cleared
Skip if bit in register is set
Skip if bit in I/O register cleared
Skip if bit in I/O register is set
Branch if status flag set
Branch if status flag cleared
Branch if equal
Branch if not equal
Branch if carry set
Branch if carry cleared
Branch if same or higher
Branch if lower
Branch if minus
Branch if plus
AMG-XB404
Revision: A
AMG-XB404
Fully Integrated Single Motor Controller for Electrical Motors
Operation
R1:R0 ← (Rd * Rr) << 1
PC ← PC + k + 1
PC ← Z[12:0]
PC ← k
PC ← PC + k + 1
PC ← Z[12:0]
PC ← k
PC ← STACK
PC ← STACK
If (Rd = Rr) PC ← PC + (2 or 3)
Rd - Rr
Rd - Rr - C
Rd - K
If (Rr(b) = 0) PC ← PC + (2 or 3)
If (Rr[b] = 1) PC ← PC + (2 or 3)
If (I/O(A,b) = 0) PC ← PC + (2 or 3)
If (I/O(A,b) = 1) PC ← PC + (2 or 3)
If (SREG[s] = 1) PC ← PC + k + 1
If (SREG[s] = 0) PC ← PC + k + 1
If (Z = 1) PC ← PC + k + 1
If (Z = 0) PC ← PC + k + 1
If (C = 1) PC ← PC + k + 1
If (C = 0) PC ← PC + k + 1
If (C = 0) PC ← PC + k + 1
If (C = 1) PC ← PC + k + 1
If (N = 1) PC ← PC + k + 1
If (N = 0) PC ← PC + k + 1
16 ≤ d ≤ 23; 16 ≤ r ≤ 23
-2K ≤ k < 2K
0 ≤ k < 8K
-2K ≤ k < 2K
0 ≤ k < 2K
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
0 ≤ d ≤ 31; 0 ≤ r ≤ 31
16 ≤ d ≤ 31; 0 ≤ K ≤ 255
0 ≤ r ≤ 31; 0 ≤ b ≤ 7
0 ≤ r ≤ 31; 0 ≤ b ≤ 7
0 ≤ A ≤ 31; 0 ≤ b ≤ 7
0 ≤ A ≤ 31; 0 ≤ b ≤ 7
0 ≤ s ≤ 7; -64 ≤ k ≤ 63
0 ≤ s ≤ 7; -64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
-64 ≤ k ≤ 63
Flags
Z,C
WN
11
Binary Opcode
0000 0011 1ddd 1rrr
None
11
1100 kkkk kkkk kkkk
None
11
1001 0100 0000 1001
None
22
1001 010k kkkk 110k
kkkk kkkk kkkk kkkk
None
12
1101 kkkk kkkk kkkk
None
12
1001 0101 0000 1001
None
22
1001 010k kkkk 111k
kkkk kkkk kkkk kkkk
None
12
1001 0101 0000 1000
None
12
1001 0101 0001 1000
None
1 1/2 0001 00rd dddd rrrr
Z,C,N,V,H,S 1 1
0001 01rd dddd rrrr
Z,C,N,V,H,S 1 1
0000 01rd dddd rrrr
Z,N,V,C,H,S 1 1
0011 KKKK dddd KKKK
None
1 1/2 1111 110r rrrr 0bbb
None
1 1/2 1111 111r rrrr 0bbb
None
1 1/2 1001 1001 AAAA Abbb
None
1 1/2 1001 1011 AAAA Abbb
None
11
1111 00kk kkkk ksss
None
11
1111 01kk kkkk ksss
None
11
1111 00kk kkkk k001
None
11
1111 01kk kkkk k001
None
11
1111 00kk kkkk k000
None
11
1111 01kk kkkk k000
None
11
1111 01kk kkkk k000
None
11
1111 00kk kkkk k000
None
11
1111 00kk kkkk k010
None
11
1111 01kk kkkk k010
6. Nov. 2012
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