AK8857VQ Datasheet, PDF (93/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
Contrast Control A Register (R/W) [Sub Address 0x14] (A block register)
Contrast Control B Register (R/W) [Sub Address 0x2C] (B block register)
Contrast adjustment setting register.
Sub Address 0x14, 0x2C
bit 7
bit 6
bit 5
CONTA7 CONTA6 CONTA5
CONTB7 CONTB6 CONTB5
Default Value
1
0
0
bit 4
CONTA4
CONTB4
0
bit 3
CONTA3
CONTB3
0
bit 2
CONTA2
CONTB2
0
Default Value: 0x80
bit 1
bit 0
CONTA1 CONTA0
CONTB1 CONTB0
0
0
Contrast Control A/B Register Definition
Bit Register Name
R/W Definition
bit 0 CONTA/B 0
~
~
bit 7 CONTA/B 7
Register for contrast adjustment in steps of
Contrast Control_A/B R/W 1/128 in range 1~255/128 from default
value of 0x80
Brightness Control A Register (R/W) [Sub Address 0x15] (A block register)
Brightness Control B Register (R/W) [Sub Address 0x2D] (B block register)
Brightness adjustment setting register
Sub Address 0x15, 0x2D
bit 7
bit 6
bit 5
BRA7
BRA6
BRA5
BRB7
BRB6
BRB5
Default Value
0
0
0
bit 4
BRA4
BRB4
0
bit 3
BRA3
BRB3
0
bit 2
BRA2
BRB2
0
Default Value: 0x00
bit 1
bit 0
BRA1
BRA0
BRB1
BRB0
0
0
Brightness Control A/B Register Definition
Bit Register Name
bit 0 BRA/B0
~~
bit 7 BRA/B7
Brightness Control_A/B
R/W Definition
Register for brightness adjustment in steps
R/W
of 1 by 8-bit code setting in 2’s complement
MS1189-E-01
-93-
2010/12