AK8857VQ Datasheet, PDF (7/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
Pin
Symbol
No.
49 OE_B
50 OE_A
51 PVDD2
52 RSTN
53 PDN
54 SDA
55 SCL
56 SELA
57 AVDD
58 XTO
59 AVSS
60 XTI
61 VRN
62 IREF
P/S¹ I/O²
Functional Description
B block Output Enable pin.
P2 I
L: Digital output pin in Hi-z output mode.
H: Data output mode.
Hi-z input to OE_B pin is prohibited.
A block Output Enable pin.
P2 I
L: Digital output pin in Hi-z output mode.
H: Data output mode.
Hi-z input to OE_A pin is prohibited.
P2 P Microprocessor I/F power supply pin.
Reset signal input pin.
P2 I
Hi-z input is prohibited.
L: Reset.
H: Normal operation.
Power-down control pin.
P2 I
Hi-z input is prohibited.
L: Power-down.
H: Normal operation.
I²C data pin. Connect to PVDD2 via a pull-up register.
P2 I/O Hi-z input possible when RSTN=L.
Will not accept SDA input during reset sequence.
I²C clock input pin. Use PVDD2 or lower for input.
P2 I
Hi-z input possible when PDN=L.
Will not accept SCL input during reset sequence.
I²C bus address selector pin.
I
P2
PVDD2 connection: Slave address [0x8A]
(O)
DVSS connection: Slave address [0x88]
A
P
Analog power supply pin.
Crystal connection pin.
Connect to digital ground via 22 pF capacitor as shown in Sec. 10.
A
O Use 24.576 MHz crystal.
When PDN=L, output level is DVSS.
If crystal is not used, connect to NC or DVSS.
A
G Analog ground pin.
Crystal connection pin.
A
I
Connect to digital ground via 22 pF capacitor as shown in Sec. 10.
Use 24.576 MHz crystal resonator.
For input from 24.576 MHz crystal oscillator, use this pin.
Internal reference negative voltage pin for AD converter.
A
O
Connect to AVSS via ≥0.1 µF ceramic capacitor.
Reference current setting pin.
A
O
Connect to ground via 6.8 kΩ (≤1% accuracy) resistor.
MS1189-E-01
-7-
2010/12