AK8857VQ Datasheet, PDF (92/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
Control 0 A Register (R/W) [Sub Address 0x13] (A block register)
Control 0 B Register (R/W) [Sub Address 0x2B] (B block register)
Sub Address 0x13, 0x2B
Default Value: 0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
NSIGMDA1 NSIGMDA0 C443FILA1 C443FILA0 C358FILA1 C358FILA0 AGCTLA
Reserved
NSIGMDB1 NSIGMDB0 C443FILB1 C443FILB0 C358FILB1 C358FILB0 AGCTLB
Default Value
0
0
0
0
0
0
0
0
Control 0 A/B Register Definition
Bit Register Name
R/W Definition
Transition speed setting, between
bit 0 AGCTLA/B
peak AGC and sync AGC
AGC Transition Level_A/B R/W
[0] : Quick
[1] : Slow
C-filter bandwidth setting, for 3.58 MHz
subcarrier system signal
bit 1 C358FILA/B 0
[C358FILA/B 1 : C358FILA/B 0 ]
~
~
C Filter_358 Select_A/B
R/W [00] : 3.58 Narrow
bit 2 C358FILA/B 1
[01] : 3.58 Medium
[10] : 3.58 Wide
[11] : Reserved
C-filter bandwidth setting, for 4.43 MHz
subcarrier system signal
bit 3 C443FILA/B 0
[C443FILA/B 1 : C443FILA/B 0 ]
~
~
C Filter_443 Select_A/B
R/W [00] : 4.43 Narrow
bit 4 C443FILA/B 1
[01] : 4.43 Medium
[10] : 4.43 Wide
[11] : Reserved
Setting for output on no-signal detection *
[NSIGMDA/B 1 : NSIGMDA/B 0]
bit 5 NSIGMDA/B 0
[00] : Black-level output
~
~
No Signal Output Mode_A/B R/W
[01] : Blue-level (Blueback) output
bit 6 NSIGMDA/B 1
[10] : Input status (sandstorm) output
[11] : Reserved
bit 7 Reserved
Reserved
R/W Reserved
* DOA/B[1:0] register of Sub-address”0x01/0x28” takes priority regardless to no-signal detection
setting adjustment above when the DOA/B[1:0] register value is set other than [00].
MS1189-E-01
-92-
2010/12