AK8857VQ Datasheet, PDF (22/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
The figure below shows the relationship between 1-line data pixel and sync signal timing for each
output pixel size.
*() in the figure below refers to clock pixels of 625-line input.
*Because the data is sampling to a fixed-clock, the cycle period from end of active signal to the next
line of horizontal sync signal is fixed is not guarantee.
○720x487, 720x576(ITU-R BT.601)
Video Signal
HD
DVALID
HACT
128CLK
244CLK
(264CLK)
○640x480(VGA)
1440CLK
Active Video section
32CLK
(24CLK)
Video Signal
HD
DVALID
HACT
128CLK
324CLK
(344CLK)
1280CLK
Active Video section
112CLK
(104CLK)
MS1189-E-01
-22-
2010/12