AK8857VQ Datasheet, PDF (14/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
(3) Output Data Timing
DATA_A[7:0], HD_ACT_A, VD_ACT_A, FIELD_A, DVALID_A, DATA_A[7:0], HD_ACT_A,
VD_ACT_A, FIELD_A, DVALID_A
DTCLK
OUTPUT DATA
tDS
tDH
0.5PVDD1
0.5PVDD1
Parameter
Output Data Setup Time
Output Data Hold Time
(4) Register reset timing
Symbol Min
Typ
Max Units
DTCLK
10
tDS
5
nsec
nsec
27MHz
54MHz
10
tDH
5
nsec
nsec
27MHz
54MHz
RSTN
VIL
RESETTIMING
fCLK
Parameter
RSTN pulse width
Symbol
RESETTIMING
Min
100
(3.7)
Typ Max Units
CLK
(usec)
Note. Clock input is necessary for reset operation.
RSTN pin must be pulled low following clock application.
Notes
Based on clock leading
edge
MS1189-E-01
-14-
2010/12