AK8857VQ Datasheet, PDF (80/105 Pages) Asahi Kasei Microsystems – Dual Channel Digital Video Decoder

[AK8857VQ]
Control 2 Register (R/W) [Sub Address 0x05] (Common register)
Control register setting.
R/W block is depends on REGSEL setting of Sub-Address “0x00”.
Sub Address 0x05
bit 7
bit 6
CKILSEL STUPATOFF
Default Value
0
0
bit 5
Reserved
0
bit 4
Reserved
0
bit 3
Reserved
Default Value : 0x00
bit 2
bit 1
bit 0
Reserved DPAL1 DPAL0
0
0
0
0
Control 2 Register Definition
Bit Register Name
bit 0 DPAL0
~
~
bit 1 DPAL1
Deluxe PAL
bit 2
~ Reserved
bit 5
Reserved
bit 6 STUPATOFF Setup Auto Control Off
bit 7 CKILSEL
Color killer Select
R/W
R/W
R/W
R/W
R/W
Definition
Setting for color averaging*
(PAL phase correction block)
[ DPAL1 : DPAL0 ]
[00] : Adaptive phase correction ON
[01] : Phase correction ON
[10] : Phase correction OFF
[11] : Reserved
Reserved
Setup auto switching setting (ON/OFF) in auto
signal detection mode
[0] : Auto setup switching ON
[1] : Auto setup switching OFF
Color killer activation setting
[0] : Activation when burst color level is below
CKLVL[3:0]-bits threshold setting
[1] : Activation when burst color level is below
CKLVL[3:0]-bits threshold setting or
color decode PLL lock fails
MS1189-E-01
-80-
2010/12