AK4497 Datasheet, PDF (85/98 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4497]
Addr Register Name
06H Control 4
R/W
Default
D7
DDM
R/W
0
D6
DML
R
0
D5
DMR
R
0
D4
DMC
R/W
0
D3
DMRE
R/W
0
D2
D1
D0
0
DSDD DSDSEL0
R/W
R/W
R/W
0
0
0
DSDSEL[1:0]: DSD sampling speed control
00: 2.8224MHz
01: 5.6448MHz
10: 11.2896MHz
11: 22.5792MHz
DSDD: DSD play back path control
0: Normal Path (default)
1: Volume Bypass
DMRE: DSD Mute Release
This register is only valid when DDM bit = “1” and DMC bit = “1”. When the AK4497 mutes
DSD data by DDM and DMC bits settings, the mute is released by setting DMRE bit to “1”.
0: Hold (default)
1: Mute Release
DMC: DSD Mute Control
This register is only valid when DDM bit = “1”. It selects the mute releasing mode of when the
DSD data level becomes under full-scale after the AK4497 mutes DSD data by DDM bit
setting.
0: Auto Return (default)
1: Mute Hold
DMR/DML
This register outputs detection flag when a full scale signal is detected at DSDR/L channel.
(only in I2C mode)
DDM: DSD Data Mute
The AK4497 has an internal mute function that mutes the output when DSD audio data
becomes all “1” or all “0” for 2048 Samples (1/fs). DDM bit controls this function.
0: Disable (default)
1: Enable
Rev. 0.1
- 85 -
2015/11