AK4497 Datasheet, PDF (78/98 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4497]
SDA
SCL
S
start condition
P
stop condition
Figure 66. Start Condition and Stop Condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 67. Acknowledge (I²C Bus)
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 68. Bit Transfer (I²C Bus)
Rev. 0.1
- 78 -
2015/11