AK4497 Datasheet, PDF (67/98 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4497]
(AVDD, TVDD) first, 1.8V power supply (DVDD) next and 5V power supplies (VDDL/R,
VREFHL/R) last.
Power
(TVDD,AVDD)
Power
（DVDD）
Power
（VDDL/R,VREFHL/R）
PDN pin
(1)
Internal PDN
(2)
Internal
State
DAC In
(Digital)
DAC Out
(Analog)
(4)
(5)
Clock In
Don’t care
MCLK,LRCK,BICK
External
Mute
(6)
Normal Operation (DAC Input Available)
Reset
“0”data
GD ⁽³⁾
“0”data
GD
(5)
(4)
Don’t care
Mute ON
Mute ON
Figure 51. Power-down/up Sequence Example (Pin Control Mode, LDOE pin= “L”)
Notes:
(1) The PDN pin must be held “L” for more than 150ns after supplying AVDD, TVDD, DVDD and
VDDL/R.
(2) Internal shutdown switch is powered up after the PDN pin = “H” when the LDOE pin= “L”. The
internal circuit will start operation after the shutdown switch is ON (max. 1us).
(3) The analog output corresponding to the digital input has group delay (GD).
(4) Analog outputs are floating (Hi-Z) in power down mode.
(5) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(6) Mute the analog output externally if click noise (5) adversely affect system performance.
Rev. 0.1
- 67 -
2015/11