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AK4497 Datasheet, PDF (82/98 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC | |||
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[AK4497]
Addr Register Name
01H Control 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
DZFE DZFM
SD
DFS1 DFS0 DEM1 DEM0 SMUTE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
0
0
0
1
0
SMUTE: Soft Mute Enable
0: Normal Operation (default)
1: DAC outputs soft-muted.
DEM[1:0]: De-emphasis Filter Control (Table 29)
Initial value is â01â (OFF).
DFS[1:0]: Sampling Speed Control. (Table 7, Table 10)
Initial value is â000â (Normal Speed). Click noise occurs when DFS1-0 bits are changed.
SD: Minimum delay Filter Enable. (Table 27)
0: Traditional filter
1: Short delay filter (default)
DZFM:
Data Zero Detect Mode
0: Channel Separated Mode (default)
1: Channel ANDed Mode
If the DZFM bit is set to â1â, the DZF pins of both L and R channels go to âHâ only when the
input data at both channels are continuously zeros for 8192 LRCK cycles.
DZFE:
Data Zero Detect Enable
0: Disable (default)
1: Enable
Zero detect function can be disabled by DZFE bit â0â. In this case, the DZF pins of both
channels are always âLâ.
Rev. 0.1
- 82 -
2015/11
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