AK4497 Datasheet, PDF (60/98 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4497]
■ Zero Detection (PCM, DSD, EXDF)
The AK4497 has a channel-independent zeros detect function. When the input data at each channel is
continuously zeros for 8192 LRCK cycles, the DZF pin of each channel outputs zero detection flag
independently. The DZFL/R pin outputs zero detection flag if the input data is continuously zeros for
16384 LRCK cycles in DSD 512fs mode (DP bit = “1” and DSDSEL[1:0] bits = “11”). Polarity of the
detection flag of the DZFL/R pin can be selected by DZFB bit. The DZFL/R pin goes “H” for zero detection
when DZFB bit = “0”, the DZFL/R pin goes “L” when DZFB bit = “1”.
When DZFB bit = “0”, the DZFL/R pin immediately returns to “L” if the input data of each channel is not
zero after going to “H”. If the RSTN bit is “0”, the DZF pins of both L and R channels go to “H”. The DZFL/R
pin returns to “L” in 4 ~ 5/fs after the input data of each channel becomes “1” when RSTN bit is set to “1”.
If DZFM bit is set to “1” while DZFB bit = “0”, the DZF pins of both L and R channels go to “H” only when
the input data for both channels are continuously zeros for 8192 LRCK cycles (16384 LRCK cycles in
DSD 512fs mode). The zero detect function can be disabled by setting the DZFE bit. In this case, DZF
pins of both channels are always “L”. The zero detect function is also disabled when Volume Bypass is
selected in DSD mode (refer to p42).
DZFE
0
1
Table 34. Zero Detect Select.
DZFB RSTN
Data
0
-
-
1
-
-
0
-
0
not zero
1
zero detect
0
-
1
1
not zero
zero detect
DZF-pin
L
H
H
L
H
L
H
L
Rev. 0.1
- 60 -
2015/11